National Polytechnic Institute of Cambodia Entrance Exam Set

The question probes the understanding of the fundamental principles of digital signal processing, specifically concerning the Nyquist-Shannon sampling theorem and its implications for aliasing. The Nyquist-Shannon sampling theorem states that to perfectly reconstruct a signal from its samples, the sampling frequency (\(f_s\)) must be at least twice the highest frequency component (\(f_{max}\)) present in the signal. Mathematically, this is expressed as \(f_s \ge 2f_{max}\). If the sampling frequency is less than twice the maximum frequency, aliasing occurs, where higher frequencies masquerade as lower frequencies, distorting the reconstructed signal. In this scenario, the analog signal has a maximum frequency component of 8 kHz. To avoid aliasing, the sampling frequency must be at least \(2 \times 8 \text{ kHz} = 16 \text{ kHz}\). The question states that the signal is sampled at 12 kHz. Since \(12 \text{ kHz} < 16 \text{ kHz}\), aliasing will occur. The aliased frequency (\(f_{alias}\)) can be calculated using the formula \(f_{alias} = |f – k \cdot f_s|\), where \(f\) is the original frequency and \(k\) is an integer chosen such that \(f_{alias}\) falls within the range \([0, f_s/2]\). For a frequency of 8 kHz and a sampling rate of 12 kHz, we can find the aliased frequency. Let's consider the 8 kHz frequency. We need to find an integer \(k\) such that \(|8 \text{ kHz} – k \cdot 12 \text{ kHz}|\) is minimized and falls within \([0, 6 \text{ kHz}]\). If \(k=0\), the aliased frequency is \(|8 \text{ kHz} – 0 \cdot 12 \text{ kHz}| = 8 \text{ kHz}\). This is greater than \(f_s/2 = 6 \text{ kHz}\). If \(k=1\), the aliased frequency is \(|8 \text{ kHz} – 1 \cdot 12 \text{ kHz}| = |-4 \text{ kHz}| = 4 \text{ kHz}\). This frequency, 4 kHz, falls within the range \([0, 6 \text{ kHz}]\). Therefore, the 8 kHz component will be aliased to 4 kHz. The correct answer is the frequency that the highest frequency component (8 kHz) will appear as after sampling at 12 kHz, which is 4 kHz. This understanding is crucial for students at the National Polytechnic Institute of Cambodia, particularly in programs related to electronics, telecommunications, and computer engineering, where signal integrity and accurate data acquisition are paramount. Proper sampling is a foundational concept for digital signal processing, image processing, and control systems, all of which are areas of focus within the institute's curriculum. Failure to adhere to sampling principles can lead to significant errors in data analysis and system performance, underscoring the importance of this concept for future engineers.

The core concept here revolves around the ethical considerations of data privacy and intellectual property within a research context, particularly relevant to the rigorous academic environment at the National Polytechnic Institute of Cambodia. When a research team, such as one at NPIC, utilizes a dataset collected by a previous, unrelated project, several ethical and legal principles come into play. The primary consideration is whether the original data collection had provisions for secondary use or if explicit consent was obtained for such purposes. Without such consent or clear terms of use, repurposing the data could violate the privacy of the individuals whose information was collected and potentially infringe upon the intellectual property rights of the original researchers or the funding body. The scenario presented highlights a common challenge in academic research: the re-use of existing data. The question probes the candidate’s understanding of the ethical framework governing such practices. The most ethically sound and legally compliant approach is to seek explicit permission from the original data custodians or, if that’s not feasible, to ensure the data is fully anonymized and that the original terms of use permit secondary analysis. Simply assuming that because data is available, it can be freely used, is a significant ethical lapse. The National Polytechnic Institute of Cambodia, like any reputable institution, emphasizes responsible research conduct, which includes respecting data provenance and the rights of data subjects. Therefore, the most appropriate action is to obtain formal authorization, ensuring transparency and adherence to established research ethics guidelines. This demonstrates a commitment to academic integrity and the protection of individuals’ information, aligning with the institute’s values.

The question probes the understanding of fundamental principles in digital logic design, specifically concerning the minimization of Boolean expressions and the implications of using different logic gates. The core concept tested is the relationship between Karnaugh maps (K-maps), Boolean algebra, and the efficiency of implementation using NAND gates. Consider a Boolean function \(F(A, B, C) = \sum m(1, 3, 6, 7)\). First, we represent this function in its Sum of Products (SOP) form using the minterms: \(F(A, B, C) = A’B’C + A’BC + ABC’ + ABC\) Next, we can construct a 3-variable Karnaugh map for this function. The minterms correspond to the following cells in the K-map: m1: 001 m3: 011 m6: 110 m7: 111 Grouping adjacent 1s in the K-map to achieve the minimal SOP form: Group 1: m6 and m7 (110, 111) simplifies to AB. Group 2: m1 and m3 (001, 011) simplifies to A’C. Group 3: m3 and m7 (011, 111) simplifies to BC. The minimal SOP form is \(F(A, B, C) = AB + A’C + BC\). However, we can further simplify this expression using Boolean algebra. Notice that \(BC\) is redundant because \(BC = BC(A+A’) = ABC + A’BC\). The minterms for \(BC\) are m6 (110) and m7 (111). The minterms for \(AB\) are m6 (110) and m7 (111). The minterms for \(A’C\) are m1 (001) and m3 (011). Let’s re-examine the K-map grouping. m1 (001) and m3 (011) group to \(A’C\). m6 (110) and m7 (111) group to \(AB\). m3 (011) and m7 (111) group to \(BC\). The minimal SOP form derived from the K-map is indeed \(F(A, B, C) = AB + A’C\). This is because the grouping of m3 and m7 (BC) overlaps with the grouping of m6 and m7 (AB) and m1 and m3 (A’C). The term BC is covered by the other two terms. Specifically, \(AB\) covers m6 and m7, and \(A’C\) covers m1 and m3. The minterm m3 is covered by \(A’C\), and m7 is covered by \(AB\). The term \(BC\) would cover m3 and m7. Since both m3 and m7 are already covered by the other terms, \(BC\) is redundant. So, the minimal SOP is \(F(A, B, C) = AB + A’C\). Now, we need to implement this minimal SOP expression using only NAND gates. The universal property of NAND gates means any Boolean function can be implemented using them. To convert an SOP expression to a NAND-only implementation, we use the following steps: 1. Double negate the expression: \(F = \overline{\overline{F}}\) 2. Apply De Morgan’s Law to the outer negation: \(F = \overline{(\overline{AB}) \cdot (\overline{A’C})}\) 3. Recognize that \(X \cdot Y\) implemented with NAND gates is \(\overline{\overline{X} \cdot \overline{Y}}\). 4. Implement each term \(AB\) and \(A’C\) as a NAND gate. The output of these two NAND gates are then fed into a third NAND gate. – \(AB\) implemented with NAND is \(\overline{\overline{AB}}\). This requires one NAND gate for \(\overline{AB}\) and another NAND gate to invert this result. – \(A’C\) implemented with NAND is \(\overline{\overline{A’C}}\). This requires one NAND gate for \(\overline{A’C}\) and another NAND gate to invert this result. A more direct method for SOP to NAND conversion: For an SOP expression \(F = P_1 + P_2 + … + P_n\), where \(P_i\) are product terms: 1. Implement each product term \(P_i\) using NAND gates. A product term like \(XY\) is implemented as \(\overline{\overline{XY}}\), which requires two NAND gates. 2. Combine the outputs of these product term implementations using a final NAND gate. Let’s apply this to \(F = AB + A’C\). Term 1: \(AB\). To implement \(AB\) using NAND gates, we first get \(\overline{AB}\) using one NAND gate. Then, to get \(AB\), we need to invert \(\overline{AB}\), which requires another NAND gate (with inputs tied together or using the output of the first gate as one input and the other input grounded, which is not standard, or more correctly, feeding \(\overline{AB}\) into a NAND gate with one input grounded if allowed, or more practically, using the output of \(\overline{AB}\) as input to a NAND gate with its other input connected to the output of the same gate, effectively creating an inverter). A standard way to implement \(AB\) using NANDs is \(\overline{\overline{AB}}\). This requires one NAND gate for \(\overline{AB}\) and a second NAND gate to invert it. So, \(AB\) requires 2 NAND gates. Term 2: \(A’C\). Similarly, \(A’C\) requires 2 NAND gates. First, \(A’C\) needs an inverter for \(A’\) (1 NAND gate), then \(A’C\) is formed by \(\overline{\overline{A’C}}\) (2 NAND gates). So, \(A’C\) requires 3 NAND gates in total (1 for A’ and 2 for the product). Let’s re-evaluate the conversion of a product term to NAND. To implement \(XY\) using NAND gates: \(\overline{\overline{XY}}\). This is \(\overline{\overline{X} \cdot \overline{Y}}\). This requires one NAND gate for \(\overline{X}\) (if X is a literal) or \(\overline{X \cdot Y}\) and then another NAND gate to invert the result. So, \(AB\) requires one NAND gate to produce \(\overline{AB}\), and a second NAND gate to invert this to \(AB\). \(A’C\) requires one NAND gate to produce \(A’\), then one NAND gate to produce \(\overline{A’C}\), and a third NAND gate to invert this to \(A’C\). A more efficient conversion for SOP to NAND: For \(F = P_1 + P_2 + … + P_n\), the NAND implementation is \(\overline{\overline{P_1} \cdot \overline{P_2} \cdot … \cdot \overline{P_n}}\). Each \(P_i\) is a product term. \(P_1 = AB\). To implement \(AB\) using NANDs, we need \(\overline{\overline{AB}}\). This is achieved by one NAND gate for \(\overline{AB}\) and a second NAND gate to invert it. \(P_2 = A’C\). To implement \(A’C\) using NANDs, we first need \(A’\) (1 NAND gate). Then we need to implement \(A’C\). This is \(\overline{\overline{A’C}}\). This requires one NAND gate for \(\overline{A’C}\) and a second NAND gate to invert it. So, \(A’C\) requires 1 (for A’) + 2 = 3 NAND gates. Let’s use the standard SOP to NAND conversion: 1. Implement each product term using NAND gates. A product term \(XY\) is implemented as \(\overline{\overline{XY}}\). This requires two NAND gates. 2. The sum \(P_1 + P_2\) is implemented as \(\overline{\overline{P_1} \cdot \overline{P_2}}\). So, for \(F = AB + A’C\): 1. Implement \(AB\) using NANDs: \(\overline{\overline{AB}}\). This requires 2 NAND gates. 2. Implement \(A’C\) using NANDs: \(\overline{\overline{A’C}}\). This requires 1 NAND gate for \(A’\) and 2 NAND gates for the product, totaling 3 NAND gates. This approach is getting complicated. Let’s use the direct conversion rule for SOP to NAND: For \(F = P_1 + P_2 + … + P_n\), the NAND implementation is \(\overline{\overline{P_1} \cdot \overline{P_2} \cdot … \cdot \overline{P_n}}\). This means we need to get the inverted product terms \(\overline{P_i}\) and then feed them into a final NAND gate. \(P_1 = AB\). \(\overline{P_1} = \overline{AB}\). This is directly available from one NAND gate. \(P_2 = A’C\). \(\overline{P_2} = \overline{A’C}\). This requires an inverter for \(A’\) (1 NAND gate) and then a NAND gate for \(\overline{A’C}\) (1 NAND gate). So, 2 NAND gates for \(\overline{A’C}\). The expression becomes \(F = \overline{\overline{AB} \cdot \overline{A’C}}\). This structure requires: – One NAND gate for \(\overline{AB}\). – One NAND gate for \(A’\). – One NAND gate for \(\overline{A’C}\). – One final NAND gate to combine \(\overline{AB}\) and \(\overline{A’C}\). Total NAND gates = 1 (\(\overline{AB}\)) + 1 (\(A’\)) + 1 (\(\overline{A’C}\)) + 1 (final NAND) = 4 NAND gates. Let’s verify the logic: NAND1: Inputs A, B. Output \(\overline{AB}\). NAND2: Input A. Output \(A’\). NAND3: Inputs \(A’\) (from NAND2) and C. Output \(\overline{A’C}\). NAND4: Inputs \(\overline{AB}\) (from NAND1) and \(\overline{A’C}\) (from NAND3). Output \(\overline{\overline{AB} \cdot \overline{A’C}}\). By De Morgan’s Law, \(\overline{\overline{AB} \cdot \overline{A’C}} = \overline{\overline{AB}} + \overline{\overline{A’C}} = AB + A’C\). This implementation uses 4 NAND gates. Now consider alternative minimal forms. The expression \(F = AB + A’C + BC\) can be simplified. Using the consensus theorem: \(XY + X’Z + YZ = XY + X’Z\). Here, \(X=A\), \(Y=B\), \(Z=C\). So, \(AB + A’C + BC = AB + A’C\). This confirms the minimal SOP form. The question asks for the minimum number of NAND gates required to implement the function. The minimal SOP form is \(F = AB + A’C\). To implement this using NAND gates: 1. Implement \(AB\) using NANDs: \(\overline{\overline{AB}}\). This requires 2 NAND gates. 2. Implement \(A’C\) using NANDs: \(\overline{\overline{A’C}}\). This requires 1 NAND gate for \(A’\) and 2 NAND gates for the product, totaling 3 NAND gates. Let’s use the standard conversion for SOP to NAND: \(F = P_1 + P_2 + … + P_n\) Convert to NAND: \(\overline{\overline{P_1} \cdot \overline{P_2} \cdot … \cdot \overline{P_n}}\) This requires implementing each \(\overline{P_i}\) and then feeding them into a final NAND gate. \(P_1 = AB\). \(\overline{P_1} = \overline{AB}\). This is directly from one NAND gate. \(P_2 = A’C\). \(\overline{P_2} = \overline{A’C}\). This requires an inverter for \(A’\) (1 NAND gate) and then a NAND gate for \(\overline{A’C}\) (1 NAND gate). So, 2 NAND gates are needed for \(\overline{A’C}\). The final structure is \(\overline{\overline{AB} \cdot \overline{A’C}}\). This requires: – NAND gate 1: Inputs A, B. Output \(\overline{AB}\). – NAND gate 2: Input A. Output \(A’\). – NAND gate 3: Inputs \(A’\) (from NAND gate 2) and C. Output \(\overline{A’C}\). – NAND gate 4: Inputs \(\overline{AB}\) (from NAND gate 1) and \(\overline{A’C}\) (from NAND gate 3). Output \(\overline{\overline{AB} \cdot \overline{A’C}}\). Total NAND gates = 4. Let’s consider other possibilities. Could we implement the function using fewer than 4 NAND gates? The minimal SOP form \(AB + A’C\) involves two product terms. Each product term generally requires at least two NAND gates to implement (one for the product, one for inversion). The sum then requires a final NAND gate. If we have \(P_1 + P_2\), the NAND implementation is \(\overline{\overline{P_1} \cdot \overline{P_2}}\). To get \(\overline{P_1}\) and \(\overline{P_2}\), we need to implement the inverted product terms. \(\overline{AB}\) requires 1 NAND gate. \(\overline{A’C}\) requires 1 NAND gate for \(A’\) and 1 NAND gate for \(\overline{A’C}\), totaling 2 NAND gates. The final NAND gate combines these. Total = 1 (\(\overline{AB}\)) + 2 (\(\overline{A’C}\)) + 1 (final NAND) = 4 NAND gates. This is a standard conversion. The number of NAND gates for an SOP expression \(F = P_1 + P_2 + … + P_n\) is \(N_{NAND} = (\sum_{i=1}^{n} N_{gates\_for\_P_i}) + 1\), where \(N_{gates\_for\_P_i}\) is the number of gates to implement \(P_i\) as a product term. For \(P_i = X_1 X_2 … X_k\), the NAND implementation is \(\overline{\overline{X_1 X_2 … X_k}}\). This requires \(k\) inverters (if variables are not complemented) and \(k\) NAND gates for the product, then 1 NAND gate for inversion. A simpler way: \(P_i\) as a product term requires \(k\) NAND gates if all variables are literals, plus one for inversion. \(AB\) requires 2 NAND gates (\(\overline{\overline{AB}}\)). \(A’C\) requires 3 NAND gates (\(\overline{\overline{A’C}}\), including the inverter for A’). Let’s use the direct conversion of SOP to NAND: \(F = AB + A’C\) 1. Implement \(AB\) as \(\overline{\overline{AB}}\) (2 NAND gates). 2. Implement \(A’C\) as \(\overline{\overline{A’C}}\) (3 NAND gates, including inverter for A’). 3. Combine these using a final NAND gate. This method is not efficient. The correct method is: \(F = AB + A’C\) Convert to NAND: \(\overline{\overline{AB} \cdot \overline{A’C}}\) This requires: – \(\overline{AB}\): 1 NAND gate. – \(A’\): 1 NAND gate. – \(\overline{A’C}\): 1 NAND gate (inputs \(A’\) and C). – Final NAND: inputs \(\overline{AB}\) and \(\overline{A’C}\). Total = 1 + 1 + 1 + 1 = 4 NAND gates. Consider the possibility of using the POS form. The complement of F is \(F’ = (A+B’)(A’+B)(A’+C)\). Minterms for F are 1, 3, 6, 7. Maxterms for F are 0, 2, 4, 5. \(F = \prod M(0, 2, 4, 5)\) \(F = (A+B+C)(A+B’+C)(A’+B+C)(A’+B’+C)\) To implement POS with NAND gates, we first convert to NOR gates and then to NAND. Or, we can use the rule: \(F = P_1 + P_2 + … + P_n\) becomes \(\overline{\overline{P_1} \cdot \overline{P_2} \cdot … \cdot \overline{P_n}}\). For POS: \(F = C_1 \cdot C_2 \cdot … \cdot C_m\). Convert to NAND: \(\overline{\overline{C_1} + \overline{C_2} + … + \overline{C_m}}\). This requires implementing each \(\overline{C_i}\) and then feeding them into a NOR gate (which can be implemented with NANDs). \(\overline{A+B+C}\) requires 3 NAND gates (one for each literal inversion, then one for the sum). \(\overline{A+B’+C}\) requires 3 NAND gates. \(\overline{A’+B+C}\) requires 3 NAND gates. \(\overline{A’+B’+C}\) requires 3 NAND gates. Total for these inverted clauses = 4 * 3 = 12 NAND gates. Then, these are ORed, which is equivalent to NANDing the inverted terms. \(\overline{\overline{C_1} + \overline{C_2} + … + \overline{C_m}}\) is not the correct conversion. The conversion of POS to NAND is: \(F = C_1 \cdot C_2 \cdot … \cdot C_m\) \(F = \overline{\overline{C_1} + \overline{C_2} + … + \overline{C_m}}\) This requires implementing \(\overline{C_i}\) and then ORing them, which is a NOR operation. \(\overline{C_1} = \overline{A+B+C}\). This requires 3 NAND gates. \(\overline{C_2} = \overline{A+B’+C}\). This requires 3 NAND gates. \(\overline{C_3} = \overline{A’+B+C}\). This requires 3 NAND gates. \(\overline{C_4} = \overline{A’+B’+C}\). This requires 3 NAND gates. Total for these inverted clauses = 12 NAND gates. Then, the OR operation \(\overline{C_1} + \overline{C_2} + \overline{C_3} + \overline{C_4}\) is implemented using a NOR gate structure. A NOR gate can be implemented with NAND gates. A NOR gate \(X+Y\) is \(\overline{\overline{X}+\overline{Y}}\). So, we need to implement \(\overline{C_1}, \overline{C_2}, \overline{C_3}, \overline{C_4}\) and then OR them. This is equivalent to implementing \(\overline{C_1}, \overline{C_2}, \overline{C_3}, \overline{C_4}\) and then feeding them into a NOR gate. A NOR gate can be implemented by NANDing the inverted inputs and then NANDing the result. This is getting too complicated. Let’s stick to the SOP form \(F = AB + A’C\). The minimal number of NAND gates for \(F = AB + A’C\) is 4. Consider if there’s a simpler form or a trick. The consensus term \(BC\) was redundant. The expression \(AB + A’C\) is the minimal SOP. Could we implement it with 3 NAND gates? A 3-NAND gate implementation typically results in a function of the form \(\overline{\overline{P_1} \cdot \overline{P_2}}\) or \(\overline{P_1 + P_2}\) or \(\overline{P_1 \cdot P_2}\). If we have 3 NAND gates, we can implement \(\overline{\overline{AB} \cdot \overline{A’}}\) or similar. Let’s try to construct a 3-NAND gate circuit. NAND1: A, B -> \(\overline{AB}\) NAND2: A, C -> \(\overline{AC}\) NAND3: \(\overline{AB}\), \(\overline{AC}\) -> \(\overline{\overline{AB} \cdot \overline{AC}}\) = \(AB + AC\). This is not our function. NAND1: A, B -> \(\overline{AB}\) NAND2: A’, C -> \(\overline{A’C}\) (requires inverter for A’) NAND3: \(\overline{AB}\), \(\overline{A’C}\) -> \(\overline{\overline{AB} \cdot \overline{A’C}}\) = \(AB + A’C\). This requires an inverter for A’, which is 1 NAND gate. So, 1 (for \(\overline{AB}\)) + 1 (for \(A’\)) + 1 (for \(\overline{A’C}\)) + 1 (final NAND) = 4 NAND gates. What if we use the original SOP \(F(A, B, C) = A’B’C + A’BC + ABC’ + ABC\)? This has 4 product terms. To implement each product term using NANDs: \(A’B’C\): requires 1 NAND for \(A’\), 1 NAND for \(B’\), 1 NAND for \(\overline{A’B’}\), 1 NAND for \(\overline{(\overline{A’B’})C}\). Total 4 NANDs. This is not efficient. The standard conversion for SOP to NAND is: \(F = P_1 + P_2 + … + P_n\) Implement each \(P_i\) as \(\overline{\overline{P_i}}\). \(AB\) requires 2 NAND gates. \(A’C\) requires 3 NAND gates (including inverter for A’). Total for the terms = 2 + 3 = 5. Then a final NAND gate to sum them. 5 + 1 = 6. This is incorrect. The correct conversion for SOP to NAND is: \(F = P_1 + P_2 + … + P_n\) Convert to NAND: \(\overline{\overline{P_1} \cdot \overline{P_2} \cdot … \cdot \overline{P_n}}\) This requires implementing \(\overline{P_i}\) for each term and then feeding them into a final NAND gate. \(\overline{P_1} = \overline{AB}\). This is 1 NAND gate. \(\overline{P_2} = \overline{A’C}\). This requires 1 NAND gate for \(A’\) and 1 NAND gate for \(\overline{A’C}\). Total 2 NAND gates. The final NAND gate combines \(\overline{AB}\) and \(\overline{A’C}\). Total NAND gates = 1 (\(\overline{AB}\)) + 2 (\(\overline{A’C}\)) + 1 (final NAND) = 4 NAND gates. Let’s consider the possibility of using 3 NAND gates. A 3-NAND gate circuit can implement functions like \(AB+AC\), \(A’B’+A’C’\), etc. If we have 3 NAND gates, we can implement \(\overline{\overline{X \cdot Y} \cdot \overline{Z}}\) or \(\overline{\overline{X \cdot Y} + \overline{Z}}\) (which is not a standard form). Consider the structure: NAND1: A, B -> \(\overline{AB}\) NAND2: A, C -> \(\overline{AC}\) NAND3: \(\overline{AB}\), \(\overline{AC}\) -> \(\overline{\overline{AB} \cdot \overline{AC}}\) = \(AB + AC\). NAND1: A, B -> \(\overline{AB}\) NAND2: A’, C -> \(\overline{A’C}\) (requires inverter for A’) NAND3: \(\overline{AB}\), \(\overline{A’C}\) -> \(\overline{\overline{AB} \cdot \overline{A’C}}\) = \(AB + A’C\). This requires an inverter for A’, which is 1 NAND gate. So, the components are: 1. NAND gate for \(\overline{AB}\). 2. NAND gate for \(A’\). 3. NAND gate for \(\overline{A’C}\). 4. NAND gate for the final combination. This totals 4 NAND gates. Could there be a way to combine operations to reduce the gate count? The function is \(F = AB + A’C\). Let’s look at the structure of the expression. It’s a sum of two product terms. The standard conversion to NANDs requires inverting the product terms and then NANDing them. \(\overline{AB}\) is one NAND. \(\overline{A’C}\) requires an inverter for A’ (1 NAND) and then a NAND for the product (1 NAND). So, 2 NANDs for \(\overline{A’C}\). The final NAND combines these. Total = 1 + 2 + 1 = 4. What if we consider the dual function? The dual of \(AB + A’C\) is \((A+B)(A’+C)\). \((A+B)(A’+C) = AA’ + AC + BA’ + BC = 0 + AC + A’B + BC = AC + A’B + BC\). Using consensus theorem: \(AC + A’B + BC = AC + A’B\). So, the dual function is \(AC + A’B\). To implement \(AC + A’B\) using NOR gates: Convert to NOR: \(\overline{\overline{AC} + \overline{A’B}}\). This requires implementing \(\overline{AC}\) and \(\overline{A’B}\) and then ORing them. \(\overline{AC}\) requires 2 NAND gates. \(\overline{A’B}\) requires 1 NAND for \(A’\) and 1 NAND for \(\overline{A’B}\), totaling 2 NAND gates. The OR operation \(\overline{X} + \overline{Y}\) is \(\overline{\overline{X} \cdot \overline{Y}}\). So, we need to implement \(\overline{AC}\) and \(\overline{A’B}\) and then NAND them. Total = 2 (\(\overline{AC}\)) + 2 (\(\overline{A’B}\)) + 1 (final NAND) = 5 NAND gates. This confirms that the SOP form is more efficient for NAND implementation. The question is about the minimum number of NAND gates. The minimal SOP form is \(F = AB + A’C\). The conversion to NAND gates is \(\overline{\overline{AB} \cdot \overline{A’C}}\). This requires: 1. NAND gate for \(\overline{AB}\). 2. NAND gate for \(A’\). 3. NAND gate for \(\overline{A’C}\). 4. NAND gate for the final combination. This totals 4 NAND gates. Let’s consider if there’s any simplification possible that reduces the gate count to 3. A 3-NAND gate circuit can implement functions of the form \(\overline{\overline{P_1} \cdot \overline{P_2}}\) where \(P_1\) and \(P_2\) are single literals or simple products. For example, \(\overline{\overline{A \cdot B} \cdot \overline{C}}\) or \(\overline{\overline{A} \cdot \overline{B \cdot C}}\). Our function \(AB + A’C\) involves two product terms, one of which requires an inversion of a literal. The structure \(\overline{\overline{AB} \cdot \overline{A’C}}\) inherently requires at least 4 NAND gates: one for \(\overline{AB}\), one for \(A’\), one for \(\overline{A’C}\), and one for the final output. Therefore, the minimum number of NAND gates required is 4. Final check: Function: \(F(A, B, C) = \sum m(1, 3, 6, 7)\) Minimal SOP: \(F = AB + A’C\) NAND implementation: \(\overline{\overline{AB} \cdot \overline{A’C}}\) Gate breakdown: – NAND1: A, B -> \(\overline{AB}\) – NAND2: A -> \(A’\) – NAND3: \(A’\), C -> \(\overline{A’C}\) – NAND4: \(\overline{AB}\), \(\overline{A’C}\) -> \(\overline{\overline{AB} \cdot \overline{A’C}}\) = \(AB + A’C\) Total = 4 NAND gates. This is a standard result in digital logic design for implementing a sum of two product terms where one term involves a complemented variable. The National Polytechnic Institute of Cambodia Entrance Exam often tests such fundamental digital logic conversion principles. The question tests the ability to: 1. Simplify Boolean expressions using Karnaugh maps or Boolean algebra. 2. Understand the universal nature of NAND gates. 3. Apply the correct conversion procedure from SOP to NAND logic. 4. Determine the minimum number of gates required for a given implementation. The options provided will likely include 3, 4, 5, and possibly 6, requiring a precise understanding of the conversion process. The calculation is as follows: 1. Identify the minterms: \(m(1, 3, 6, 7)\). 2. Derive the minimal Sum of Products (SOP) form: \(F(A, B, C) = AB + A’C\). 3. Convert the SOP to NAND-only implementation: \(F = \overline{\overline{AB} \cdot \overline{A’C}}\). 4. Count the required NAND gates: – One NAND gate for \(\overline{AB}\). – One NAND gate for the inverter \(A’\). – One NAND gate for \(\overline{A’C}\). – One final NAND gate to combine the outputs. Total = 1 + 1 + 1 + 1 = 4 NAND gates. The correct answer is 4.

The question probes the understanding of ethical considerations in engineering design, specifically within the context of sustainable development, a core principle at the National Polytechnic Institute of Cambodia. The scenario presents a conflict between immediate economic benefit and long-term environmental impact. The calculation here is conceptual, weighing the ethical imperatives. Ethical Principle: Beneficence and Non-Maleficence (Do good and avoid harm). Application to Sustainability: Sustainable engineering aims to meet present needs without compromising the ability of future generations to meet their own needs. This involves considering the full lifecycle impact of a design, including resource depletion, pollution, and social equity. In the given scenario, the proposed dam project, while offering immediate energy benefits, carries significant environmental and social costs. The disruption of river ecosystems, potential displacement of communities, and long-term effects on downstream agriculture represent substantial harm. Prioritizing the preservation of biodiversity and the well-being of existing and future populations aligns with the ethical duty to avoid harm and promote the greater good. Therefore, a responsible engineering approach, as espoused by the National Polytechnic Institute of Cambodia’s commitment to societal progress, would necessitate a thorough re-evaluation and potentially the abandonment of the project in its current form, or at least the implementation of extensive mitigation strategies that address the identified harms. The core ethical dilemma lies in balancing immediate utility with enduring responsibility. The most ethically sound approach, reflecting the principles of responsible innovation and stewardship, is to prioritize the long-term ecological and social integrity over short-term gains.

The core principle being tested here is the understanding of how different economic policies can influence the balance of payments, specifically the current account. The National Polytechnic Institute of Cambodia Entrance Exam often emphasizes practical applications of economic theory. Consider a scenario where a nation, let’s call it “Kampong Cham,” is experiencing a persistent deficit in its current account. This means Kampong Cham is importing more goods and services than it is exporting, leading to an outflow of domestic currency. To address this, the government has several policy options. Option 1: Devaluation of the domestic currency. A weaker currency makes exports cheaper for foreign buyers and imports more expensive for domestic consumers. This should, in theory, boost exports and reduce imports, thereby improving the current account balance. Option 2: Imposing tariffs on imported goods. Tariffs are taxes on imports, making them more expensive. This directly aims to reduce the volume of imports, thus helping to narrow the current account deficit. Option 3: Increasing domestic interest rates. Higher interest rates can attract foreign capital, leading to an appreciation of the domestic currency. Currency appreciation makes exports more expensive and imports cheaper, which would likely worsen the current account deficit, not improve it. Option 4: Implementing export subsidies. Subsidies make domestic goods cheaper for foreign buyers, thereby encouraging exports. Increased exports would contribute to a reduction in the current account deficit. The question asks which policy would be LEAST effective in reducing a current account deficit. Based on the analysis, increasing domestic interest rates (Option 3) is likely to lead to currency appreciation, which has the opposite effect of what is desired for improving the current account balance. While other policies might have varying degrees of effectiveness and potential side effects (e.g., retaliation for tariffs, inflationary pressures from subsidies), currency appreciation due to higher interest rates directly works against the goal of reducing a current account deficit. Therefore, increasing domestic interest rates is the least effective policy for this specific objective.

The core principle tested here is the understanding of how technological advancements, particularly in digital infrastructure and connectivity, can influence the economic development and societal integration of a nation like Cambodia. The question probes the strategic prioritization of foundational elements for a modern, knowledge-based economy. While all options represent aspects of development, the most critical *foundational* element for widespread digital participation and the subsequent leveraging of technology for economic growth is robust and accessible internet infrastructure. Without this, advancements in areas like e-governance, digital education, or remote work remain limited in their reach and impact. Therefore, prioritizing the expansion of high-speed, affordable internet access across urban and rural areas of Cambodia directly addresses the most significant bottleneck for digital transformation and inclusive economic participation, aligning with the National Polytechnic Institute of Cambodia’s focus on technological advancement and its application for national progress.

The question probes the understanding of foundational principles in the development of robust software systems, a core area of study at the National Polytechnic Institute of Cambodia. The scenario describes a situation where a new feature in a widely used educational platform, developed by students at NPIC, is causing unexpected data corruption. This points to a failure in how the new code interacts with existing data structures or how it handles concurrent access. The core issue is likely related to the **principle of least privilege** and **data integrity**. When a new module or feature is introduced, it should only have the necessary permissions to perform its intended functions and should not be able to arbitrarily modify or delete data it is not responsible for. Furthermore, ensuring data integrity means that data remains accurate, consistent, and reliable throughout its lifecycle. In this context, the corruption suggests a breach of these principles. Let’s consider the potential causes: 1. **Insufficient Input Validation:** The new feature might be accepting malformed or malicious input that, when processed, overwrites or corrupts valid data. 2. **Race Conditions/Concurrency Issues:** If multiple processes or users are accessing and modifying the same data simultaneously without proper synchronization mechanisms (like locks), one process might overwrite changes made by another, leading to corruption. 3. **Unintended Side Effects:** The new code might have logical flaws that cause it to access or modify data outside its intended scope, perhaps due to incorrect pointer arithmetic or faulty conditional logic. 4. **Lack of Transactional Integrity:** If the feature involves multiple data modifications, and one part fails, the entire operation should ideally be rolled back to maintain a consistent state. If this isn’t implemented, partial, corrupt data might remain. Given the scenario of data corruption affecting multiple users and the platform’s core functionality, the most encompassing and fundamental principle violated is the failure to ensure that the new component operates within defined boundaries and maintains the accuracy and consistency of the data it interacts with. This directly relates to robust error handling, secure coding practices, and the overall design for reliability. The problem isn’t just about a specific bug, but a systemic failure in how the new code was integrated and validated against the existing system’s integrity. Therefore, the most appropriate answer addresses the fundamental need for the new component to respect and uphold the integrity of the entire data ecosystem it operates within, ensuring that its operations do not compromise the reliability of other parts of the system. This is achieved through rigorous testing, secure coding, and adherence to design principles that prioritize data safety and system stability. The correct answer is the one that emphasizes the need for the new feature to operate with minimal necessary permissions and to actively safeguard the integrity of the existing data structures, preventing unauthorized or erroneous modifications. This aligns with the core tenets of secure and reliable software engineering taught at institutions like the National Polytechnic Institute of Cambodia.

The question probes the understanding of the foundational principles of engineering ethics and professional responsibility within the context of a polytechnic institution like the National Polytechnic Institute of Cambodia. Specifically, it tests the ability to discern the most critical ethical consideration when a student engineer discovers a potential flaw in a design they are developing for a public infrastructure project. The core of ethical engineering practice, particularly in public works, lies in prioritizing public safety and well-being above all else. This principle is enshrined in most professional engineering codes of conduct. When a student engineer identifies a potential flaw, the immediate and paramount responsibility is to ensure that this flaw does not compromise the safety of the intended users or the general public. This necessitates halting further development of the flawed component or design until the issue is thoroughly investigated and rectified. Reporting the discovery to a supervising faculty member or project lead is the procedural mechanism for initiating this investigation and ensuring accountability. While other considerations like project timelines, cost implications, and intellectual property are important in a professional setting, they are secondary to the imperative of public safety. A delay or increased cost to ensure safety is always preferable to a catastrophic failure that could result from a compromised design. Therefore, the most critical ethical action is to address the potential safety hazard directly and transparently.

The question probes the understanding of the fundamental principles of digital signal processing, specifically focusing on aliasing and its mitigation. Aliasing occurs when the sampling rate of a signal is insufficient to accurately represent its highest frequency components. The Nyquist-Shannon sampling theorem states that to perfectly reconstruct a signal, the sampling frequency (\(f_s\)) must be at least twice the highest frequency component (\(f_{max}\)) present in the signal, i.e., \(f_s \ge 2f_{max}\). This minimum sampling frequency is known as the Nyquist rate. In the given scenario, a continuous-time signal containing frequencies up to \(15 \text{ kHz}\) is sampled at a rate of \(25 \text{ kHz}\). To determine if aliasing will occur, we compare the sampling frequency to twice the maximum frequency. Here, \(f_{max} = 15 \text{ kHz}\) and \(f_s = 25 \text{ kHz}\). The Nyquist rate for this signal would be \(2 \times 15 \text{ kHz} = 30 \text{ kHz}\). Since the actual sampling frequency (\(25 \text{ kHz}\)) is less than the required Nyquist rate (\(30 \text{ kHz}\)), aliasing will occur. When aliasing occurs, frequencies above \(f_s/2\) (the Nyquist frequency) are folded back into the lower frequency range, appearing as lower frequencies that were not originally present. In this case, the Nyquist frequency is \(25 \text{ kHz} / 2 = 12.5 \text{ kHz}\). The frequency component at \(15 \text{ kHz}\) is above the Nyquist frequency. This component will be aliased to a lower frequency. The aliased frequency (\(f_{aliased}\)) can be calculated using the formula \(f_{aliased} = |f – k \cdot f_s|\), where \(f\) is the original frequency and \(k\) is an integer chosen such that \(0 \le f_{aliased} \le f_s/2\). For \(f = 15 \text{ kHz}\) and \(f_s = 25 \text{ kHz}\), we can find \(k\). If \(k=1\), \(f_{aliased} = |15 \text{ kHz} – 1 \cdot 25 \text{ kHz}| = |-10 \text{ kHz}| = 10 \text{ kHz}\). This aliased frequency of \(10 \text{ kHz}\) is within the range \(0\) to \(12.5 \text{ kHz}\). Therefore, the \(15 \text{ kHz}\) component will appear as a \(10 \text{ kHz}\) component in the sampled signal. This phenomenon distorts the original signal, making accurate reconstruction impossible without proper anti-aliasing filtering. Understanding this principle is crucial for students at the National Polytechnic Institute of Cambodia, particularly in programs related to telecommunications, electronics, and computer engineering, where digital signal processing is a core component.

The question assesses understanding of the foundational principles of sustainable urban development, a key area of focus within engineering and urban planning programs at the National Polytechnic Institute of Cambodia. The scenario involves a city grappling with increased population density and resource strain. The correct approach prioritizes integrated systems thinking, which is central to the Institute’s curriculum. This involves considering the interconnectedness of environmental, social, and economic factors. Specifically, the development of a comprehensive public transportation network directly addresses reduced vehicular emissions (environmental), improved accessibility and reduced commute times for citizens (social), and potential economic benefits through increased efficiency and reduced infrastructure wear (economic). This holistic approach aligns with the Institute’s commitment to fostering responsible and forward-thinking professionals. Other options, while potentially having some merit, are less comprehensive. Focusing solely on green building codes, while important, does not address the broader systemic issues of mobility and resource distribution. Implementing a strict water rationing policy, without accompanying infrastructure improvements or public engagement, can lead to social unrest and economic disruption. Encouraging individual car ownership with stricter parking regulations, paradoxically, exacerbates congestion and pollution, contradicting the goal of sustainable development. Therefore, the integrated approach of enhancing public transit offers the most effective and sustainable solution for the described urban challenges, reflecting the interdisciplinary nature of studies at the National Polytechnic Institute of Cambodia.

The core principle being tested here is the understanding of how different project management methodologies address uncertainty and change, particularly in the context of innovation and rapid development, which is crucial for programs at the National Polytechnic Institute of Cambodia. Agile methodologies, like Scrum, are designed to embrace change and deliver value incrementally, making them suitable for projects with evolving requirements. Waterfall, conversely, is a linear approach that assumes stable requirements and is less adaptable to unforeseen shifts. Lean principles focus on eliminating waste and optimizing flow, which can be applied within various methodologies but doesn’t inherently dictate the project’s response to evolving scope as directly as Agile does. Six Sigma is primarily a data-driven approach to process improvement and defect reduction, focusing on quality and efficiency rather than the adaptive management of project scope in an innovative environment. Therefore, for a project at the National Polytechnic Institute of Cambodia involving the development of a novel educational platform with potentially shifting user needs, an Agile approach would be the most effective for managing the inherent uncertainty and ensuring the final product aligns with emergent requirements.

The question probes the understanding of the foundational principles of sustainable urban development, a key area of focus for institutions like the National Polytechnic Institute of Cambodia, which often emphasizes practical, forward-thinking solutions for national growth. The scenario describes a city facing common urban challenges: increased population density, strain on infrastructure, and environmental degradation. The core of the question lies in identifying the most effective strategy for mitigating these issues while adhering to principles of long-term viability and resource management. The calculation to arrive at the correct answer is conceptual, not numerical. It involves evaluating each proposed solution against the principles of sustainability: environmental protection, social equity, and economic viability. 1. **Option 1 (Focus on rapid industrial expansion):** While economic growth is a component of sustainability, unchecked industrial expansion often leads to increased pollution, resource depletion, and social displacement, thus undermining environmental and social pillars. This is not the most holistic approach. 2. **Option 2 (Prioritize immediate infrastructure upgrades without long-term planning):** This addresses immediate needs but lacks foresight. Upgrades without considering future population growth, environmental impact, or integration with other systems can lead to obsolescence or new problems. It’s a short-term fix. 3. **Option 3 (Implement integrated urban planning with a focus on green technologies and community engagement):** This option directly addresses all three pillars of sustainability. “Integrated urban planning” ensures a holistic approach. “Green technologies” tackle environmental concerns (e.g., renewable energy, efficient waste management, sustainable transportation). “Community engagement” addresses social equity by involving residents in decision-making and ensuring solutions meet their needs. This approach fosters resilience and long-term well-being, aligning with the educational philosophy of the National Polytechnic Institute of Cambodia. 4. **Option 4 (Encourage outward urban sprawl to alleviate density):** While this might temporarily reduce density in the core, urban sprawl often leads to increased reliance on private vehicles (higher emissions), habitat destruction, and inefficient use of resources and infrastructure, making it environmentally and economically unsustainable in the long run. Therefore, the strategy that best embodies sustainable urban development principles, as would be expected in an academic context at the National Polytechnic Institute of Cambodia, is the integrated approach combining green technologies and community involvement.

The question probes the understanding of the fundamental principles of effective project management within the context of an engineering curriculum, as emphasized at the National Polytechnic Institute of Cambodia. Specifically, it tests the candidate’s ability to discern the most critical factor for ensuring successful project completion, considering the interdependencies of various project elements. The core of project management success lies in the ability to balance the “triple constraint” – scope, time, and cost – while also managing quality and stakeholder expectations. However, the question asks for the *most* critical factor. While all listed options are important, the ability to accurately define and control the project’s scope is paramount. If the scope is poorly defined or allowed to “scope creep” without proper change management, it directly impacts the timeline and budget, and consequently, the quality. A clear, well-defined scope acts as the foundation upon which all other project management activities are built. Without this clarity, efforts to manage time, cost, or resources become reactive and inefficient, often leading to project failure. Therefore, meticulous scope definition and management are the bedrock of successful project execution, especially in technical fields like those offered at the National Polytechnic Institute of Cambodia, where precision and adherence to specifications are vital.

The question probes the understanding of fundamental principles of sustainable urban development, a core area of study at the National Polytechnic Institute of Cambodia, particularly within its engineering and urban planning programs. The scenario describes a city facing rapid growth and resource strain. The core concept being tested is the integration of ecological considerations into urban infrastructure planning to mitigate negative environmental impacts. The calculation, while not numerical, involves a logical deduction based on the principles of environmental engineering and urban design. The city’s challenge is to balance economic development with environmental preservation. 1. **Identify the core problem:** Rapid urbanization leading to resource depletion and environmental degradation. 2. **Analyze the goal:** Achieve sustainable growth. 3. **Evaluate the options based on sustainability principles:** * **Option 1 (Focus on immediate economic gains):** Prioritizing short-term industrial expansion without considering long-term environmental consequences is antithetical to sustainability. This would likely exacerbate resource depletion and pollution. * **Option 2 (Emphasis on traditional infrastructure):** While necessary, solely relying on conventional, often resource-intensive, infrastructure (like extensive concrete paving and centralized, non-renewable energy sources) without incorporating green technologies would not address the root causes of environmental strain. * **Option 3 (Integrated green infrastructure and resource management):** This approach directly addresses the problem by focusing on: * **Green infrastructure:** Permeable surfaces, urban green spaces, and bioswales manage stormwater runoff, reduce the urban heat island effect, and improve air quality. * **Renewable energy:** Transitioning to solar, wind, or other renewable sources reduces reliance on fossil fuels, lowering greenhouse gas emissions. * **Water conservation and recycling:** Implementing efficient water use strategies and wastewater treatment/reuse minimizes strain on freshwater resources. * **Waste-to-energy/circular economy principles:** Reducing landfill waste and recovering resources aligns with ecological principles. This holistic approach fosters resilience and long-term environmental health, aligning with the National Polytechnic Institute of Cambodia’s commitment to developing responsible and forward-thinking professionals. * **Option 4 (Strict population control):** While population growth is a factor, focusing solely on population control without addressing consumption patterns and infrastructure efficiency is an incomplete and often socially complex solution. It doesn’t inherently promote sustainable resource management or technological innovation. Therefore, the most effective strategy for achieving sustainable urban development in the described scenario, aligning with the academic rigor and practical application emphasized at the National Polytechnic Institute of Cambodia, is the integration of green infrastructure and advanced resource management techniques.

The question probes the understanding of the foundational principles of sustainable development as applied to technological innovation, a core area of study at the National Polytechnic Institute of Cambodia. The scenario involves a proposed smart city infrastructure project in Phnom Penh. To determine the most ethically and practically sound approach, one must consider the interconnectedness of environmental, social, and economic factors. The calculation is conceptual, not numerical. We are evaluating the alignment of each option with the three pillars of sustainable development: 1. **Environmental Sustainability:** Minimizing ecological footprint, resource conservation, pollution reduction. 2. **Social Sustainability:** Equity, community well-being, cultural preservation, accessibility, and public participation. 3. **Economic Sustainability:** Long-term viability, job creation, efficient resource allocation, and affordability. Let’s analyze the options: * **Option 1 (Focus on immediate cost reduction and efficiency):** This primarily addresses economic sustainability but may neglect environmental and social impacts, potentially leading to short-term gains at the expense of long-term well-being or ecological balance. For instance, prioritizing cheaper, less durable materials might increase waste later. * **Option 2 (Emphasis on advanced, unproven technologies):** While potentially offering high efficiency, this option carries significant risks. The environmental impact of manufacturing and disposal of these technologies might be unknown or substantial. Socially, it could create a digital divide if not implemented equitably, and economically, the high initial investment and potential for rapid obsolescence could be unsustainable. * **Option 3 (Integration of local ecological knowledge and community participation):** This option directly addresses all three pillars. * **Environmental:** Incorporating local ecological knowledge suggests a sensitive approach to resource use and waste management, aligning with environmental sustainability. * **Social:** Community participation ensures that the project meets the needs and respects the values of the local population, fostering social equity and acceptance. This is crucial for the long-term success and legitimacy of any urban development project, especially in a context like Cambodia where cultural heritage is highly valued. * **Economic:** While not explicitly stating cost reduction, a well-integrated, community-supported project is more likely to be economically viable in the long run due to reduced conflict, better resource utilization, and potential for local economic empowerment through participation. This approach aligns with the National Polytechnic Institute of Cambodia’s commitment to developing solutions that are both innovative and contextually relevant. * **Option 4 (Prioritizing aesthetic appeal and international design standards):** This option focuses on a superficial aspect of development. While aesthetics are important, prioritizing them over core sustainability principles can lead to projects that are visually pleasing but environmentally damaging, socially exclusive, or economically unviable. International standards may not always be appropriate for local contexts. Therefore, the approach that best embodies the holistic principles of sustainable development, which are central to the educational philosophy of the National Polytechnic Institute of Cambodia, is the one that integrates local knowledge and ensures community involvement. This fosters a resilient, equitable, and environmentally responsible urban future.

The question probes the understanding of fundamental principles in digital logic design, specifically related to combinational circuits and their minimization. The scenario describes a situation where a digital system’s behavior is defined by a truth table, and the task is to find the most simplified Sum of Products (SOP) expression. The truth table provided is: | A | B | C | Output (F) | |—|—|—|————| | 0 | 0 | 0 | 0 | | 0 | 0 | 1 | 1 | | 0 | 1 | 0 | 0 | | 0 | 1 | 1 | 1 | | 1 | 0 | 0 | 0 | | 1 | 0 | 1 | 0 | | 1 | 1 | 0 | 1 | | 1 | 1 | 1 | 1 | From the truth table, the minterms where the output F is 1 are: – A=0, B=0, C=1 (m1) – A=0, B=1, C=1 (m3) – A=1, B=1, C=0 (m6) – A=1, B=1, C=1 (m7) The initial SOP expression is: \(F = \bar{A}\bar{B}C + \bar{A}BC + AB\bar{C} + ABC\) To simplify this expression, a Karnaugh map (K-map) is the most efficient method for three variables. Constructing the K-map: “` BC 00 01 11 10 A 0 | 0 1 1 0 | 1 | 0 0 1 1 | “` Now, we group the adjacent 1s in the K-map to obtain the minimized SOP expression. 1. **Group 1:** The two 1s in the A=0 row, columns BC=01 and BC=11. This group covers minterms m1 (\(\bar{A}\bar{B}C\)) and m3 (\(\bar{A}BC\)). The common terms are \(\bar{A}\) and \(C\). So, this group simplifies to \(\bar{A}C\). 2. **Group 2:** The two 1s in the A=1 row, columns BC=11 and BC=10. This group covers minterms m7 (\(ABC\)) and m6 (\(AB\bar{C}\)). The common terms are \(A\) and \(B\). So, this group simplifies to \(AB\). 3. **Group 3:** The two 1s in the BC=11 column, rows A=0 and A=1. This group covers minterms m3 (\(\bar{A}BC\)) and m7 (\(ABC\)). The common terms are \(B\) and \(C\). So, this group simplifies to \(BC\). The minimized SOP expression is obtained by ORing the simplified terms from the essential prime implicants. In this K-map, all 1s are covered by at least one prime implicant. We need to select a minimal set of prime implicants that cover all the 1s. – \(\bar{A}C\) covers m1 and m3. – \(AB\) covers m6 and m7. – \(BC\) covers m3 and m7. To cover all minterms (m1, m3, m6, m7), we can choose: – \(\bar{A}C\) (covers m1, m3) – \(AB\) (covers m6, m7) This combination covers all required minterms. The expression is \(\bar{A}C + AB\). Alternatively, we could choose: – \(\bar{A}C\) (covers m1, m3) – \(BC\) (covers m3, m7) – \(AB\) (covers m6, m7) This would give \(\bar{A}C + BC + AB\). However, \(BC\) is redundant because m3 is covered by \(\bar{A}C\) and m7 is covered by \(AB\). Therefore, the most minimal SOP is \(\bar{A}C + AB\). Let’s re-examine the K-map for potential larger groupings or overlaps that might lead to a more simplified form. “` BC 00 01 11 10 A 0 | 0 1 1 0 | (m1, m3) 1 | 0 0 1 1 | (m7, m6) “` The prime implicants are: – \(\bar{A}C\) (covering m1, m3) – \(BC\) (covering m3, m7) – \(AB\) (covering m6, m7) To cover all minterms (m1, m3, m6, m7): – We must include \(\bar{A}C\) to cover m1. – We must include \(AB\) to cover m6. – Now, m3 and m7 are covered by \(\bar{A}C\) and \(AB\) respectively. However, \(BC\) also covers m3 and m7. Let’s consider the essential prime implicants. – m1 is only covered by \(\bar{A}C\). So, \(\bar{A}C\) is an essential prime implicant. – m6 is only covered by \(AB\). So, \(AB\) is an essential prime implicant. With \(\bar{A}C\) and \(AB\), we have covered m1, m3, m6, and m7. The simplified expression is \(\bar{A}C + AB\). Let’s verify if this is the most minimal form. Consider the expression \(F = \bar{A}\bar{B}C + \bar{A}BC + AB\bar{C} + ABC\). Using Boolean algebra: \(F = \bar{A}C(\bar{B} + B) + AB(C + \bar{C})\) \(F = \bar{A}C(1) + AB(1)\) \(F = \bar{A}C + AB\) This confirms the result. The question is designed to test the ability to translate a truth table into a Boolean expression and then simplify it using Karnaugh maps or Boolean algebra, a core skill in digital electronics, which is a significant area of study at the National Polytechnic Institute of Cambodia. Understanding minimization is crucial for designing efficient and cost-effective digital circuits, aligning with the institute’s focus on practical engineering solutions. The ability to identify essential prime implicants and avoid redundant terms is key to achieving the most simplified form, which directly impacts the number of logic gates required, power consumption, and propagation delay in a real-world implementation.

The question probes the understanding of foundational principles in engineering design, specifically concerning the iterative nature of problem-solving and the importance of feedback loops in achieving optimal solutions. When a design team at the National Polytechnic Institute of Cambodia is tasked with developing a new sustainable water filtration system for rural communities, they must first establish clear performance metrics. These metrics, such as flow rate, contaminant removal efficiency, and energy consumption, serve as the benchmarks against which the prototype’s success will be measured. Following the initial prototype construction and testing, the team analyzes the results. If the prototype fails to meet one or more of these predefined metrics, the next crucial step is not to abandon the project or simply start over with a completely new concept. Instead, the core engineering principle dictates a process of **iterative refinement based on performance analysis**. This involves identifying the specific areas where the prototype underperformed, hypothesizing the underlying causes (e.g., material choice, structural integrity, flow dynamics), and then modifying the design accordingly. This cycle of testing, analyzing, and modifying is repeated until the performance metrics are met. Therefore, the most effective approach to address the shortcomings of the initial prototype, ensuring progress towards the project goals at the National Polytechnic Institute of Cambodia, is to systematically revise the design based on the empirical data gathered during testing.

The core principle tested here is the understanding of how a country’s technological adoption and infrastructure development influence its economic growth trajectory, particularly in the context of emerging economies like Cambodia. The question probes the nuanced relationship between digital literacy, access to advanced manufacturing technologies, and the creation of a skilled workforce capable of leveraging these advancements. A nation’s ability to transition from primary resource extraction or basic manufacturing to higher value-added industries is contingent on its investment in human capital and the pervasive integration of technology across its economic sectors. This involves not just the availability of hardware but also the software skills, critical thinking, and problem-solving abilities of its populace. The National Polytechnic Institute of Cambodia, with its focus on technical and vocational education, plays a crucial role in this ecosystem by equipping students with the competencies needed to drive innovation and productivity. Therefore, a comprehensive strategy that prioritizes widespread digital literacy and advanced technical training is paramount for sustained economic advancement.

The question assesses understanding of the fundamental principles of project management, specifically concerning the critical path method (CPM) in the context of the National Polytechnic Institute of Cambodia’s potential construction or development projects. The critical path represents the longest sequence of tasks that must be completed on time for the entire project to be finished by its deadline. Any delay in a critical path activity directly impacts the project’s completion date. To determine the critical path, one would typically perform a forward pass and a backward pass through the project network diagram. The forward pass calculates the earliest start and finish times for each activity, while the backward pass calculates the latest start and finish times. The slack (or float) for each activity is the difference between its latest and earliest start times (or latest and earliest finish times). Activities with zero slack are on the critical path. Consider a simplified project with the following activities and dependencies: A (Duration 5 days) -> B (Duration 3 days) A (Duration 5 days) -> C (Duration 7 days) B (Duration 3 days) -> D (Duration 4 days) C (Duration 7 days) -> D (Duration 4 days) Forward Pass: Earliest Start (ES) of A = 0 Earliest Finish (EF) of A = ES + Duration = 0 + 5 = 5 ES of B = EF of A = 5 EF of B = ES of B + Duration = 5 + 3 = 8 ES of C = EF of A = 5 EF of C = ES of C + Duration = 5 + 7 = 12 ES of D = max(EF of B, EF of C) = max(8, 12) = 12 EF of D = ES of D + Duration = 12 + 4 = 16 Backward Pass (assuming project completion at EF of D = 16): Latest Finish (LF) of D = 16 Latest Start (LS) of D = LF of D – Duration = 16 – 4 = 12 LF of B = LS of D = 12 LS of B = LF of B – Duration = 12 – 3 = 9 LF of C = LS of D = 12 LS of C = LF of C – Duration = 12 – 7 = 5 LF of A = min(LS of B, LS of C) = min(9, 5) = 5 LS of A = LF of A – Duration = 5 – 5 = 0 Slack Calculation: Slack(A) = LS(A) – ES(A) = 0 – 0 = 0 Slack(B) = LS(B) – ES(B) = 9 – 5 = 4 Slack(C) = LS(C) – ES(C) = 5 – 5 = 0 Slack(D) = LS(D) – ES(D) = 12 – 12 = 0 Activities with zero slack are A, C, and D. Therefore, the critical path is A -> C -> D. The total duration of the critical path is 5 + 7 + 4 = 16 days. The correct answer is the sequence of activities that have zero slack, as these are the activities that directly determine the project’s overall duration. Understanding this concept is crucial for effective resource allocation and risk management in any complex undertaking at the National Polytechnic Institute of Cambodia, such as the development of new academic facilities or the implementation of advanced research initiatives. It allows project managers to identify potential bottlenecks and prioritize efforts to ensure timely completion, aligning with the institute’s commitment to efficient and impactful progress.

The question probes the understanding of the foundational principles of digital signal processing, specifically concerning the Nyquist-Shannon sampling theorem and its implications for analog-to-digital conversion. The scenario describes a system attempting to accurately represent an analog audio signal within the National Polytechnic Institute of Cambodia’s multimedia engineering program. The audio signal has a maximum frequency component of 15 kHz. The Nyquist-Shannon sampling theorem states that to perfectly reconstruct an analog signal from its samples, the sampling frequency (\(f_s\)) must be at least twice the highest frequency component (\(f_{max}\)) present in the signal. This minimum sampling rate is known as the Nyquist rate, given by \(f_{Nyquist} = 2 \times f_{max}\). In this case, \(f_{max} = 15 \text{ kHz}\). Therefore, the minimum required sampling frequency is \(f_s \ge 2 \times 15 \text{ kHz} = 30 \text{ kHz}\). The question asks for the *minimum* sampling frequency that guarantees no loss of information. This directly corresponds to the Nyquist rate. * **Option a) 30 kHz:** This is the calculated Nyquist rate (\(2 \times 15 \text{ kHz}\)), satisfying the theorem’s condition for perfect reconstruction. * **Option b) 10 kHz:** This sampling frequency is less than the Nyquist rate (\(10 \text{ kHz} < 30 \text{ kHz}\)). Sampling below the Nyquist rate will result in aliasing, where higher frequencies are incorrectly represented as lower frequencies, leading to information loss. * **Option c) 20 kHz:** This sampling frequency is also less than the Nyquist rate (\(20 \text{ kHz} < 30 \text{ kHz}\)), and thus will also cause aliasing and information loss. * **Option d) 40 kHz:** While this sampling frequency is *greater* than the Nyquist rate (\(40 \text{ kHz} > 30 \text{ kHz}\)), it is not the *minimum* required frequency. Using a higher sampling rate than necessary can lead to increased data storage and processing requirements without providing additional fidelity beyond what the Nyquist rate guarantees for this specific signal. The question specifically asks for the minimum. Therefore, the minimum sampling frequency that guarantees no loss of information for an analog signal with a maximum frequency of 15 kHz is 30 kHz. This principle is fundamental in digital signal processing courses at institutions like the National Polytechnic Institute of Cambodia, ensuring that students understand the trade-offs and requirements for accurate digital representation of analog phenomena.

The question probes the understanding of fundamental principles in digital logic design, specifically related to combinational circuits and their implementation using basic gates. The scenario describes a system that requires a specific output based on the input states of three switches, representing a truth table. The task is to identify the most efficient gate configuration to realize this logic. Let the three input switches be A, B, and C. The desired output Y is ‘high’ (1) only when: 1. A is high, and B is low, and C is low (A AND NOT B AND NOT C) 2. A is low, and B is high, and C is low (NOT A AND B AND NOT C) 3. A is low, and B is low, and C is high (NOT A AND NOT B AND C) This can be represented by the Boolean expression: \(Y = (A \cdot \overline{B} \cdot \overline{C}) + (\overline{A} \cdot B \cdot \overline{C}) + (\overline{A} \cdot \overline{B} \cdot C)\) This expression is a sum of products (SOP) form. Each product term requires a 3-input AND gate. The three product terms are then combined using a 3-input OR gate. This would require a total of 3 AND gates and 1 OR gate, plus the inverters for the negated inputs. However, the question asks for the *most efficient* implementation. We can analyze the given options to see which one achieves the desired logic with the fewest gates or the simplest structure. Let’s consider the structure of the desired output. It’s a specific type of XOR function, often referred to as a 3-input XOR if the output were 1 when an odd number of inputs are 1. In this case, the output is 1 when exactly one input is 1. This is a specific case of a decoder or a comparator logic. Let’s re-examine the expression: \(Y = (A \cdot \overline{B} \cdot \overline{C}) + (\overline{A} \cdot B \cdot \overline{C}) + (\overline{A} \cdot \overline{B} \cdot C)\). This logic is equivalent to detecting when exactly one of the inputs is active. Consider the possibility of using XOR gates. A 2-input XOR gate outputs 1 when its inputs are different. \(A \oplus B = (A \cdot \overline{B}) + (\overline{A} \cdot B)\) If we try to build the expression using XOR gates: \(A \oplus B \oplus C = (A \oplus B) \oplus C\) \(A \oplus B = (A \cdot \overline{B}) + (\overline{A} \cdot B)\) \((A \oplus B) \oplus C = ((A \cdot \overline{B}) + (\overline{A} \cdot B)) \oplus C\) \(= (((A \cdot \overline{B}) + (\overline{A} \cdot B)) \cdot \overline{C}) + (\overline{(A \cdot \overline{B}) + (\overline{A} \cdot B)} \cdot C)\) \(= (A \cdot \overline{B} \cdot \overline{C}) + (\overline{A} \cdot B \cdot \overline{C}) + (\overline{A} \cdot \overline{B} \cdot C)\) (using De Morgan’s laws and simplifying the double negation) This means that a 3-input XOR gate directly implements the desired logic. A 3-input XOR gate can be constructed from two 2-input XOR gates. The first 2-input XOR gate takes two inputs (e.g., A and B), and its output is fed into a second 2-input XOR gate along with the third input (C). Therefore, the most efficient implementation uses two 2-input XOR gates. This is a standard result in digital logic design where a 3-input XOR function is realized with two 2-input XOR gates. The correct answer is the configuration using two 2-input XOR gates.

The question probes the understanding of fundamental principles in engineering ethics and professional responsibility, specifically as they relate to the National Polytechnic Institute of Cambodia’s commitment to societal well-being and technological advancement. The core concept is the engineer’s duty to prioritize public safety and welfare above all other considerations, even when faced with economic pressures or client demands. This principle is often codified in professional engineering ethics guidelines. Consider a scenario where an engineering firm, contracted by the National Polytechnic Institute of Cambodia for a critical infrastructure project, discovers a design flaw that, while not immediately catastrophic, significantly increases the long-term risk of structural failure under specific, albeit infrequent, environmental conditions. The client, eager to stay within budget and on schedule, pressures the firm to overlook the flaw, arguing that the probability of the triggering event is extremely low. The firm’s lead engineer, a graduate of the National Polytechnic Institute of Cambodia, must decide on the course of action. The engineer’s primary ethical obligation, as instilled by the educational philosophy of institutions like the National Polytechnic Institute of Cambodia, is to safeguard the public. This means reporting the flaw and recommending corrective measures, even if it leads to project delays and increased costs. Failing to do so would violate the principle of professional integrity and could have severe consequences for public safety, directly contradicting the institute’s mission to produce responsible and ethical engineers. Therefore, the engineer must advocate for the necessary modifications to ensure the project’s long-term safety and reliability, thereby upholding the highest standards of the engineering profession and the reputation of their alma mater.

The question probes the understanding of the fundamental principles governing the design and operation of a basic electrical circuit, specifically focusing on Ohm’s Law and the concept of equivalent resistance in series and parallel configurations. Consider a circuit with two resistors, \(R_1\) and \(R_2\), connected in series. The total resistance, \(R_{total}\), is the sum of individual resistances: \(R_{total} = R_1 + R_2\). If \(R_1 = 10 \, \Omega\) and \(R_2 = 20 \, \Omega\), then \(R_{total} = 10 \, \Omega + 20 \, \Omega = 30 \, \Omega\). Now, consider the same two resistors connected in parallel. The reciprocal of the total resistance is the sum of the reciprocals of individual resistances: \(\frac{1}{R_{total}} = \frac{1}{R_1} + \frac{1}{R_2}\). For \(R_1 = 10 \, \Omega\) and \(R_2 = 20 \, \Omega\), this becomes \(\frac{1}{R_{total}} = \frac{1}{10 \, \Omega} + \frac{1}{20 \, \Omega} = \frac{2}{20 \, \Omega} + \frac{1}{20 \, \Omega} = \frac{3}{20 \, \Omega}\). Therefore, \(R_{total} = \frac{20}{3} \, \Omega \approx 6.67 \, \Omega\). The question asks to identify the scenario where the equivalent resistance is minimized. Comparing the series and parallel configurations, the parallel configuration yields a significantly lower equivalent resistance (\(\frac{20}{3} \, \Omega\)) than the series configuration (\(30 \, \Omega\)). This is a fundamental principle: connecting resistors in parallel always results in an equivalent resistance that is less than the smallest individual resistance in the combination. This principle is crucial for understanding how to control current flow and voltage distribution in complex circuits, a core concept in electrical engineering studies at the National Polytechnic Institute of Cambodia. Efficiently managing resistance is key to optimizing power consumption and preventing component damage, directly aligning with the institute’s focus on practical engineering solutions.

The core principle tested here is the understanding of **ethical considerations in data handling and research integrity**, a cornerstone of academic pursuits at institutions like the National Polytechnic Institute of Cambodia. When a researcher discovers a significant flaw in their published work that could mislead others, the most ethically sound and academically responsible action is to formally retract the publication. Retraction signifies that the work is no longer considered valid or reliable by the scientific community due to the identified issues. Simply issuing a correction or an erratum, while important for minor errors, is insufficient for fundamental flaws that undermine the entire study’s conclusions. Ignoring the issue or waiting for external discovery would be a severe breach of academic integrity. Therefore, initiating a retraction process is paramount to maintaining the credibility of scientific literature and upholding the ethical standards expected of researchers affiliated with the National Polytechnic Institute of Cambodia. This action demonstrates a commitment to truthfulness and accountability in scholarly endeavors.

The question probes the understanding of ethical considerations in engineering design, specifically within the context of sustainable development, a core principle at the National Polytechnic Institute of Cambodia. The scenario presents a conflict between immediate economic benefit and long-term environmental impact. The calculation to arrive at the correct answer involves a conceptual weighing of these factors, not a numerical one. 1. **Identify the core ethical dilemma:** The project aims for economic growth but risks ecological degradation. 2. **Analyze the principles of sustainable engineering:** This involves balancing economic, social, and environmental needs for present and future generations. 3. **Evaluate the proposed solution:** The initial plan prioritizes rapid development with minimal environmental safeguards. 4. **Consider alternative approaches:** A more responsible approach would integrate environmental impact assessments and mitigation strategies from the outset. 5. **Determine the most ethically sound action:** This involves prioritizing long-term ecological health and community well-being over short-term gains, aligning with the National Polytechnic Institute of Cambodia’s commitment to responsible innovation. The correct approach is to advocate for a revised plan that incorporates robust environmental impact assessments and mitigation strategies, ensuring that the project’s benefits are sustainable and do not compromise the region’s ecological integrity for future generations. This aligns with the institute’s emphasis on responsible technological advancement and its role in national development. The other options represent either a passive acceptance of potential harm, an incomplete solution, or a disregard for the broader societal implications, all of which fall short of the ethical standards expected of engineers graduating from the National Polytechnic Institute of Cambodia.

The question probes the understanding of the fundamental principles of digital signal processing, specifically concerning aliasing. Aliasing occurs when the sampling rate of a continuous-time signal is not sufficiently high relative to the highest frequency component present in the signal. According to the Nyquist-Shannon sampling theorem, the sampling frequency (\(f_s\)) must be at least twice the maximum frequency (\(f_{max}\)) present in the signal to avoid aliasing, i.e., \(f_s \ge 2f_{max}\). If this condition is not met, higher frequencies in the original signal are misrepresented as lower frequencies in the sampled signal, leading to distortion. Consider a scenario where a continuous-time signal contains frequency components up to 15 kHz. If this signal is sampled at a rate of 20 kHz, the Nyquist frequency is \(f_s/2 = 20 \text{ kHz} / 2 = 10 \text{ kHz}\). Since the signal contains frequencies (up to 15 kHz) that are higher than the Nyquist frequency (10 kHz), aliasing will occur. Specifically, the 15 kHz component will be aliased to a lower frequency. The aliased frequency (\(f_{alias}\)) can be calculated by finding the difference between the original frequency and the nearest multiple of the sampling frequency. In this case, 15 kHz is greater than the Nyquist frequency. The first image frequency above DC is \(f_s – f_{max\_original}\) if \(f_{max\_original} > f_s/2\). So, \(20 \text{ kHz} – 15 \text{ kHz} = 5 \text{ kHz}\). Therefore, the 15 kHz component will appear as a 5 kHz component in the sampled signal. This phenomenon distorts the original signal’s spectral content, making it impossible to perfectly reconstruct the original signal from its samples. Understanding this principle is crucial for students at the National Polytechnic Institute of Cambodia, particularly in programs related to electronics, telecommunications, and computer engineering, where digital signal processing is a core subject. Proper sampling is a foundational concept for accurate data acquisition and processing.

The question probes the understanding of ethical considerations in engineering design, specifically within the context of a project at the National Polytechnic Institute of Cambodia. The scenario involves a student team designing a water purification system for a rural community. The core ethical dilemma revolves around prioritizing cost-effectiveness and immediate functionality over long-term sustainability and community empowerment. The calculation is conceptual, not numerical. We are evaluating the ethical weight of different design choices. 1. **Identify the core ethical principles:** Engineering ethics often emphasizes public safety, welfare, and the environment. For the National Polytechnic Institute of Cambodia, which aims to foster responsible innovation, these principles are paramount. 2. **Analyze the proposed solution:** The team’s proposal focuses on readily available, low-cost materials and a simple filtration mechanism. This addresses immediate needs but might lack durability, require frequent maintenance (potentially beyond the community’s capacity), and not fully address potential long-term contamination sources. 3. **Evaluate alternative approaches:** A more ethically sound approach would involve considering the entire lifecycle of the system, including ease of maintenance, local material sourcing for repairs, community training, and potential for scalability. This might involve slightly higher initial costs but leads to greater long-term benefit and self-sufficiency. 4. **Determine the most ethically robust option:** The option that best balances immediate needs with long-term sustainability, community involvement, and adherence to professional engineering standards would be the most ethically defensible. This involves a proactive approach to potential future issues rather than a reactive one. The correct answer is the one that demonstrates a commitment to these broader ethical responsibilities, even if it means a more complex or initially more expensive solution. It reflects the National Polytechnic Institute of Cambodia’s commitment to producing engineers who are not only technically proficient but also socially responsible and mindful of the broader impact of their work. The chosen option represents a design philosophy that prioritizes the holistic well-being of the community and the long-term viability of the project, aligning with the institute’s mission to contribute positively to national development through ethical engineering practices.

The question probes the understanding of fundamental principles in engineering ethics and professional responsibility, specifically concerning the duty of care and the implications of negligence in design. While no direct calculation is involved, the scenario requires an analytical approach to identify the most appropriate ethical and professional response. The core concept tested is the engineer’s obligation to ensure public safety and the consequences of failing to meet established standards of practice. A professional engineer at the National Polytechnic Institute of Cambodia, like any reputable institution, is expected to uphold rigorous standards. If a design flaw, which could have been reasonably identified through diligent application of engineering principles and adherence to codes, leads to a structural failure and subsequent harm, the engineer is ethically and legally accountable. This accountability stems from the breach of the duty of care owed to the public. The most fitting response involves acknowledging the error, taking responsibility, and actively participating in rectifying the situation and preventing recurrence, which aligns with the principles of professional integrity and continuous improvement emphasized in engineering education. The other options represent either avoidance of responsibility, shifting blame, or an incomplete response that does not fully address the ethical breach.

The question probes the understanding of fundamental principles of sustainable urban development, a core area of study at the National Polytechnic Institute of Cambodia, particularly within its engineering and urban planning programs. The scenario describes a city facing rapid growth and resource strain. The correct approach to address this requires a holistic strategy that integrates environmental, social, and economic considerations. Option A, focusing on a multi-stakeholder framework for integrated resource management and green infrastructure development, directly addresses these interconnected challenges. This approach aligns with the Institute’s emphasis on innovative solutions for Cambodia’s development. The explanation of why this is correct involves understanding that sustainable urbanism is not about isolated solutions but about synergistic systems. Green infrastructure, such as permeable pavements, urban forests, and bioswales, not only manages stormwater and reduces the urban heat island effect but also enhances biodiversity and public spaces, contributing to social well-being. Integrated resource management ensures that water, energy, and waste are handled efficiently and with minimal environmental impact, fostering economic resilience. This comprehensive strategy is crucial for cities like those in Cambodia experiencing significant demographic shifts and infrastructure demands. The other options, while potentially having merit in isolation, fail to capture the systemic and integrated nature of sustainable urban development as taught and researched at the National Polytechnic Institute of Cambodia. For instance, focusing solely on technological solutions without considering social equity or governance, or prioritizing economic growth above all else, would lead to an incomplete and potentially unsustainable outcome. The Institute’s curriculum emphasizes the interconnectedness of these factors, preparing graduates to tackle complex urban challenges with a balanced and forward-thinking perspective.

The question assesses understanding of the fundamental principles of structural integrity and material science as applied in civil engineering, a core discipline at the National Polytechnic Institute of Cambodia. The scenario involves a beam subjected to bending stress. The critical concept here is the relationship between material properties, geometric dimensions, and the beam’s ability to withstand applied loads without failure. Specifically, the moment of inertia (\(I\)) of the beam’s cross-section is a key factor in determining its resistance to bending. For a rectangular cross-section of width \(b\) and height \(h\), the moment of inertia about the neutral axis is given by \(I = \frac{bh^3}{12}\). The maximum bending stress (\(\sigma_{max}\)) in a beam is proportional to the bending moment (\(M\)) and inversely proportional to the section modulus (\(S\)), where \(S = \frac{I}{y_{max}}\), and \(y_{max}\) is the distance from the neutral axis to the outermost fiber. For a rectangular beam, \(y_{max} = \frac{h}{2}\), so \(S = \frac{bh^2}{6}\). The stress is also limited by the material’s yield strength (\(\sigma_y\)). Consider two rectangular beams, Beam A and Beam B, both made of the same material with yield strength \(\sigma_y\). Beam A has dimensions: width \(b_A = 2\) units, height \(h_A = 3\) units. Beam B has dimensions: width \(b_B = 3\) units, height \(h_B = 2\) units. Calculate the moment of inertia for Beam A: \(I_A = \frac{b_A h_A^3}{12} = \frac{(2)(3^3)}{12} = \frac{2 \times 27}{12} = \frac{54}{12} = 4.5\) cubic units. Calculate the section modulus for Beam A: \(S_A = \frac{I_A}{h_A/2} = \frac{4.5}{3/2} = \frac{4.5}{1.5} = 3\) square units. Alternatively, \(S_A = \frac{b_A h_A^2}{6} = \frac{(2)(3^2)}{6} = \frac{2 \times 9}{6} = \frac{18}{6} = 3\) square units. Calculate the moment of inertia for Beam B: \(I_B = \frac{b_B h_B^3}{12} = \frac{(3)(2^3)}{12} = \frac{3 \times 8}{12} = \frac{24}{12} = 2\) cubic units. Calculate the section modulus for Beam B: \(S_B = \frac{I_B}{h_B/2} = \frac{2}{2/2} = \frac{2}{1} = 2\) square units. Alternatively, \(S_B = \frac{b_B h_B^2}{6} = \frac{(3)(2^2)}{6} = \frac{3 \times 4}{6} = \frac{12}{6} = 2\) square units. The maximum bending moment (\(M_{max}\)) a beam can withstand before yielding is given by \(M_{max} = \sigma_y \times S\). For Beam A, \(M_{max, A} = \sigma_y \times S_A = 3\sigma_y\). For Beam B, \(M_{max, B} = \sigma_y \times S_B = 2\sigma_y\). Since \(3\sigma_y > 2\sigma_y\), Beam A can withstand a larger bending moment than Beam B. This means Beam A is structurally more efficient in resisting bending due to its greater height relative to its width. The National Polytechnic Institute of Cambodia emphasizes understanding how geometric properties influence structural performance, which is crucial for designing safe and efficient infrastructure. This question probes that understanding by comparing two beams with identical material properties but different cross-sectional geometries, highlighting the significant impact of the height cubed term in the moment of inertia calculation for bending resistance.