Dar Es Salaam Institute of Technology Entrance Exam Set

The question probes the understanding of fundamental principles in electrical circuits, specifically concerning the behavior of components in series and parallel configurations and their impact on total resistance. When resistors are connected in series, their resistances add up directly to form the total resistance of the circuit. Conversely, when resistors are connected in parallel, the reciprocal of the total resistance is equal to the sum of the reciprocals of the individual resistances. Consider a scenario with two resistors, \(R_1\) and \(R_2\), connected in series. The total resistance \(R_{total\_series}\) is given by \(R_{total\_series} = R_1 + R_2\). If \(R_1 = 10 \Omega\) and \(R_2 = 20 \Omega\), then \(R_{total\_series} = 10 \Omega + 20 \Omega = 30 \Omega\). Now, consider the same two resistors connected in parallel. The total resistance \(R_{total\_parallel}\) is calculated using the formula: \[\frac{1}{R_{total\_parallel}} = \frac{1}{R_1} + \frac{1}{R_2}\] Substituting the values: \[\frac{1}{R_{total\_parallel}} = \frac{1}{10 \Omega} + \frac{1}{20 \Omega}\] To add these fractions, find a common denominator, which is 20: \[\frac{1}{R_{total\_parallel}} = \frac{2}{20 \Omega} + \frac{1}{20 \Omega} = \frac{3}{20 \Omega}\] Therefore, the total resistance in parallel is: \[R_{total\_parallel} = \frac{20 \Omega}{3} \approx 6.67 \Omega\] The question asks to compare the total resistance when these resistors are connected in series versus when they are connected in parallel. The series combination yields a higher total resistance (\(30 \Omega\)) compared to the parallel combination (\(\approx 6.67 \Omega\)). This fundamental difference arises from how current divides and recombines in these configurations. In a series circuit, the current must flow through each resistor sequentially, encountering the full opposition of each. In a parallel circuit, the current splits, with portions flowing through each branch, effectively providing multiple paths for the current, thus reducing the overall opposition. This concept is crucial for understanding circuit design and analysis, particularly in fields like electrical engineering and electronics, which are core disciplines at the Dar Es Salaam Institute of Technology. Understanding these relationships allows for the prediction and control of current flow and voltage distribution within complex electrical systems, a skill vital for aspiring engineers.

The question probes the understanding of fundamental principles in electrical circuits, specifically concerning the behavior of capacitors in series and parallel configurations, and their impact on overall capacitance. The core concept is that when capacitors are connected in series, their equivalent capacitance is calculated using the reciprocal formula: \( \frac{1}{C_{eq}} = \frac{1}{C_1} + \frac{1}{C_2} + … \). Conversely, when capacitors are connected in parallel, their equivalent capacitance is the sum of individual capacitances: \( C_{eq} = C_1 + C_2 + … \). In the given scenario, we have two capacitors, \(C_1 = 10 \mu F\) and \(C_2 = 20 \mu F\). First, these two capacitors are connected in series. The equivalent capacitance of this series combination, let’s call it \(C_{series}\), is calculated as: \[ \frac{1}{C_{series}} = \frac{1}{C_1} + \frac{1}{C_2} \] \[ \frac{1}{C_{series}} = \frac{1}{10 \mu F} + \frac{1}{20 \mu F} \] To add these fractions, we find a common denominator, which is \(20 \mu F\): \[ \frac{1}{C_{series}} = \frac{2}{20 \mu F} + \frac{1}{20 \mu F} \] \[ \frac{1}{C_{series}} = \frac{3}{20 \mu F} \] Therefore, \(C_{series} = \frac{20}{3} \mu F\). Next, this series combination (\(C_{series}\)) is then connected in parallel with a third capacitor, \(C_3 = 30 \mu F\). When components are connected in parallel, their capacitances add up to find the total equivalent capacitance. Let \(C_{total}\) be the final equivalent capacitance. \[ C_{total} = C_{series} + C_3 \] \[ C_{total} = \frac{20}{3} \mu F + 30 \mu F \] To add these, we express \(30 \mu F\) with a denominator of 3: \(30 \mu F = \frac{90}{3} \mu F\). \[ C_{total} = \frac{20}{3} \mu F + \frac{90}{3} \mu F \] \[ C_{total} = \frac{110}{3} \mu F \] Converting this to a decimal for clarity, \( \frac{110}{3} \approx 36.67 \mu F \). This question is designed to assess a student’s ability to apply the rules of series and parallel capacitor combinations in a multi-step problem, a foundational skill in electrical engineering relevant to the curriculum at Dar Es Salaam Institute of Technology. Understanding these principles is crucial for designing and analyzing circuits used in power systems, telecommunications, and control systems, all areas of focus at Dar Es Salaam Institute of Technology. The scenario requires careful application of formulas and manipulation of fractions, reflecting the analytical rigor expected of students.

The scenario describes a fundamental challenge in materials science and engineering, particularly relevant to the development of advanced composites and structural materials often explored at institutions like Dar Es Salaam Institute of Technology. The core issue is understanding how to optimize the interfacial adhesion between dissimilar materials to achieve synergistic properties. In this case, a novel ceramic reinforcement is being integrated into a polymer matrix. The goal is to enhance the composite’s tensile strength and thermal stability. The question probes the candidate’s understanding of surface chemistry and interfacial phenomena. The correct answer lies in modifying the surface of the ceramic reinforcement to promote chemical bonding or strong physical interactions with the polymer matrix. This is typically achieved through surface functionalization or the application of coupling agents. These agents act as molecular bridges, chemically reacting with both the ceramic surface and the polymer chains, thereby creating a robust interface. Without such treatment, the interface would be characterized by weaker van der Waals forces or even voids, leading to premature failure under stress and limited heat resistance. Considering the options: 1. **Surface functionalization of the ceramic reinforcement with silane coupling agents:** Silanes are well-known for their ability to bond with oxide surfaces (common in ceramics) and also possess organic functional groups that can copolymerize or interact strongly with polymer matrices. This directly addresses the need for improved interfacial adhesion. 2. **Increasing the particle size of the ceramic reinforcement:** While particle size affects stress concentration and surface area, it does not inherently improve the chemical or physical bonding at the interface. Larger particles might even lead to more pronounced stress concentrations at the interface. 3. **Annealing the polymer matrix at a higher temperature before composite fabrication:** Annealing the polymer can improve its intrinsic properties (like crystallinity or reduce residual stresses), but it does not directly enhance its interaction with the ceramic surface. The interface remains the limiting factor. 4. **Introducing a porous structure within the ceramic reinforcement:** A porous structure would increase the surface area, which might seem beneficial. However, porosity within the reinforcement itself can act as crack initiation sites and weaken the material, and it doesn’t guarantee improved bonding with the polymer matrix. The interface quality is still paramount. Therefore, the most effective strategy to enhance the composite’s properties by improving interfacial adhesion is through surface modification of the ceramic reinforcement.

The question assesses understanding of the foundational principles of electrical circuit analysis, specifically focusing on the behavior of capacitors in a DC circuit after a switch is closed. When a capacitor is initially uncharged and connected in series with a resistor and a DC voltage source through a switch, the current flow is not instantaneous. At the moment the switch is closed (t=0), the capacitor acts as a short circuit because its voltage cannot change instantaneously. Therefore, the initial current is determined solely by the voltage source and the resistance, according to Ohm’s Law. Calculation: Initial current \(I_0\) at \(t=0\) when the capacitor acts as a short circuit: \(I_0 = \frac{V}{R}\) Given \(V = 12V\) and \(R = 4\Omega\), \(I_0 = \frac{12V}{4\Omega} = 3A\) As time progresses, the capacitor begins to charge, and the voltage across it increases. This increasing voltage opposes the source voltage, causing the current to decrease. The charging process is described by the equation \(I(t) = \frac{V}{R}e^{-t/RC}\), where \(R\) is the resistance and \(C\) is the capacitance. The time constant, \(\tau = RC\), dictates the rate of charging. After a long time (approaching infinity), the capacitor becomes fully charged to the source voltage, and the current drops to zero as it acts like an open circuit in a DC steady state. The question asks about the *initial* behavior, which is characterized by the maximum current flow. This maximum current occurs at the instant the circuit is energized, before any significant charge accumulates on the capacitor. Therefore, the initial current is the voltage source divided by the total resistance in the circuit.

The question probes the understanding of fundamental principles in electrical circuit analysis, specifically focusing on the behavior of capacitors and inductors in AC circuits and their impact on power factor. In a series RLC circuit, the impedance \(Z\) is given by \(Z = R + j(X_L – X_C)\), where \(R\) is resistance, \(X_L = \omega L\) is inductive reactance, and \(X_C = \frac{1}{\omega C}\) is capacitive reactance. The power factor (PF) is defined as the cosine of the phase angle \(\phi\), where \(\tan(\phi) = \frac{X_L – X_C}{R}\). A leading power factor occurs when the circuit is predominantly capacitive, meaning \(X_C > X_L\). Conversely, a lagging power factor indicates a predominantly inductive circuit, where \(X_L > X_C\). Unity power factor is achieved when \(X_L = X_C\), resulting in resonance. In the given scenario, the circuit initially has a lagging power factor, implying \(X_L > X_C\). When a capacitor is added in series, it increases the total capacitive reactance. If the initial circuit was already close to resonance, adding more capacitance will shift the balance towards a capacitive dominance. Specifically, if the initial capacitive reactance \(X_C\) was less than the inductive reactance \(X_L\), adding another capacitor in series effectively increases the total capacitive reactance. Let the initial capacitive reactance be \(X_{C1}\) and the new capacitive reactance be \(X_{C2}\). The total capacitive reactance becomes \(X_{C_{total}} = X_{C1} + X_{C2}\). The new impedance will be \(Z_{new} = R + j(X_L – (X_{C1} + X_{C2}))\). If the initial circuit had a lagging power factor, it means \(X_L > X_{C1}\). When the additional capacitor is added, the new capacitive reactance is \(X_{C_{total}} = X_{C1} + X_{C2}\). If \(X_{C_{total}}\) becomes greater than \(X_L\), the circuit will transition from a lagging power factor to a leading power factor. This transition occurs because the term \((X_L – X_{C_{total}})\) changes from positive to negative. The power factor is \(\cos(\phi)\), where \(\tan(\phi) = \frac{X_L – X_{C_{total}}}{R}\). A leading power factor corresponds to a negative phase angle \(\phi\), meaning the current leads the voltage. This happens when the capacitive reactance dominates the inductive reactance. Therefore, adding a capacitor in series to a circuit with a lagging power factor can indeed cause it to exhibit a leading power factor if the added capacitance is sufficient to overcome the existing inductive reactance.

The question tests the understanding of the fundamental principles of electrical circuit analysis, specifically Kirchhoff’s Voltage Law (KVL) and Ohm’s Law, as applied to a series-parallel circuit. The scenario involves a student at Dar Es Salaam Institute of Technology designing a simple lighting system. First, we identify the components: a voltage source \(V_{source} = 12V\), two resistors in series \(R_1 = 10\Omega\) and \(R_2 = 20\Omega\), and a third resistor \(R_3 = 30\Omega\) in parallel with \(R_2\). The goal is to determine the voltage drop across \(R_1\). Step 1: Calculate the equivalent resistance of the parallel combination of \(R_2\) and \(R_3\). \[ R_{parallel} = \frac{R_2 \times R_3}{R_2 + R_3} \] \[ R_{parallel} = \frac{20\Omega \times 30\Omega}{20\Omega + 30\Omega} = \frac{600\Omega^2}{50\Omega} = 12\Omega \] Step 2: Calculate the total equivalent resistance of the circuit, which is \(R_1\) in series with \(R_{parallel}\). \[ R_{total} = R_1 + R_{parallel} \] \[ R_{total} = 10\Omega + 12\Omega = 22\Omega \] Step 3: Calculate the total current flowing from the voltage source using Ohm’s Law. \[ I_{total} = \frac{V_{source}}{R_{total}} \] \[ I_{total} = \frac{12V}{22\Omega} = \frac{6}{11}A \] Step 4: Determine the voltage drop across \(R_1\). Since \(R_1\) is in series with the rest of the circuit, the total current flows through it. \[ V_{R1} = I_{total} \times R_1 \] \[ V_{R1} = \frac{6}{11}A \times 10\Omega = \frac{60}{11}V \] To express this as a decimal for comparison with options: \[ V_{R1} \approx 5.45V \] The explanation should focus on the application of fundamental circuit laws. Understanding how to simplify series and parallel resistor combinations is crucial for analyzing more complex circuits encountered in electrical engineering studies at Dar Es Salaam Institute of Technology. Kirchhoff’s Voltage Law states that the sum of voltage drops around any closed loop in a circuit must equal the sum of voltage rises. Ohm’s Law, \(V=IR\), is fundamental to relating voltage, current, and resistance. The calculation demonstrates how to systematically apply these laws to find unknown voltage drops, a core skill for students in electronics and power systems. The scenario of designing a lighting system highlights the practical relevance of these concepts in real-world engineering applications, aligning with Dar Es Salaam Institute of Technology’s emphasis on practical problem-solving. The ability to correctly calculate voltage drops is essential for ensuring proper component operation, preventing overloads, and optimizing system efficiency, all critical aspects of electrical engineering design.

The scenario describes a fundamental challenge in data integrity and digital forensics within a context relevant to technological institutions like Dar Es Salaam Institute of Technology. The core issue is the potential for unauthorized modification of digital records, specifically a student’s academic transcript. The question probes the understanding of how to detect such tampering. To determine the most robust method for verifying the integrity of the digital transcript, we must consider the principles of cryptographic hashing. A cryptographic hash function takes an input (the transcript data) and produces a fixed-size string of characters, known as a hash value or digest. Crucially, even a minor change to the input data will result in a drastically different hash value. This property makes hashing ideal for detecting alterations. If the transcript was originally hashed and this hash value was securely stored (e.g., by the issuing authority), then re-calculating the hash of the received transcript and comparing it to the original stored hash is the most effective method to detect tampering. If the hashes match, the transcript is highly likely to be unaltered. If they differ, it indicates that the transcript has been modified. Let’s consider why other methods are less effective: 1. **Comparing the transcript to a printed copy:** A printed copy could also be forged or altered, and it doesn’t provide a verifiable link to the original digital source. 2. **Checking the file’s last modified date:** This metadata can be easily manipulated by an attacker, making it an unreliable indicator of integrity. 3. **Verifying the digital signature of the document author:** While digital signatures are important for authentication (proving who created or approved the document), they primarily confirm the origin and non-repudiation. They do not, by themselves, guarantee that the *content* of the document hasn’t been altered *after* signing, unless the signature process itself incorporates content hashing. However, a direct hash comparison of the content is the most direct and universally applicable method for integrity verification of the data itself. A digital signature often *includes* a hash of the document, so in essence, verifying the signature implicitly verifies the hash, but the question asks for the method to detect tampering of the transcript’s content, and direct hash comparison is the underlying principle. Therefore, the most reliable method is to re-calculate the hash of the digital transcript and compare it against a pre-existing, trusted hash value.

The question probes the understanding of fundamental principles in electrical engineering, specifically concerning the behavior of a series RLC circuit under specific conditions. The scenario describes a circuit with a resistor (R), inductor (L), and capacitor (C) connected in series to an AC voltage source. The key information provided is the frequency of the AC source and the values of R, L, and C. The question asks about the circuit’s behavior at resonance. Resonance in a series RLC circuit occurs when the inductive reactance (\(X_L\)) equals the capacitive reactance (\(X_C\)). At resonance, the impedance of the circuit is at its minimum, and it is purely resistive, equal to the resistance (R). The resonant frequency (\(f_r\)) is given by the formula: \[f_r = \frac{1}{2\pi\sqrt{LC}}\] Let’s calculate the resonant frequency for the given values: \(L = 100 \, \text{mH} = 100 \times 10^{-3} \, \text{H}\) \(C = 10 \, \mu\text{F} = 10 \times 10^{-6} \, \text{F}\) \[f_r = \frac{1}{2\pi\sqrt{(100 \times 10^{-3} \, \text{H}) \times (10 \times 10^{-6} \, \text{F})}}\] \[f_r = \frac{1}{2\pi\sqrt{1000 \times 10^{-9} \, \text{H} \cdot \text{F}}}\] \[f_r = \frac{1}{2\pi\sqrt{1 \times 10^{-6} \, \text{s}^2}}\] \[f_r = \frac{1}{2\pi \times 1 \times 10^{-3} \, \text{s}}\] \[f_r = \frac{1000}{2\pi} \, \text{Hz}\] \[f_r \approx \frac{1000}{6.283} \, \text{Hz}\] \[f_r \approx 159.15 \, \text{Hz}\] The applied AC voltage source is operating at \(160 \, \text{Hz}\). This frequency is very close to the calculated resonant frequency of approximately \(159.15 \, \text{Hz}\). Therefore, the circuit will be operating very near its resonant condition. At resonance, the inductive reactance (\(X_L = 2\pi f L\)) and capacitive reactance (\(X_C = \frac{1}{2\pi f C}\)) are equal. This causes the reactances to cancel each other out, leaving the circuit’s impedance equal to its resistance (R). Consequently, the current in the circuit will be at its maximum, and the phase difference between the voltage and current will be zero (i.e., the current will be in phase with the voltage). The circuit behaves as if it were purely resistive. The question asks about the circuit’s behavior at \(160 \, \text{Hz}\). Since \(160 \, \text{Hz}\) is very close to the resonant frequency, the circuit will exhibit characteristics of resonance. Specifically, the impedance will be minimal and primarily resistive, leading to a maximum current flow that is in phase with the applied voltage. This condition is often referred to as unity power factor.

The question probes the understanding of fundamental principles in electrical engineering, specifically concerning the behavior of circuits under transient conditions and the role of energy storage elements. A series RLC circuit, when subjected to a step input voltage, exhibits a transient response characterized by the interplay between resistance, inductance, and capacitance. The damping factor, denoted by \(\zeta\), is a critical parameter that dictates the nature of this response. For a series RLC circuit, the damping factor is given by \(\zeta = \frac{R}{2}\sqrt{\frac{C}{L}}\). The characteristic equation for a series RLC circuit is \(s^2 + \frac{R}{L}s + \frac{1}{LC} = 0\). The roots of this equation, \(s_{1,2} = -\frac{R}{2L} \pm \sqrt{\left(\frac{R}{2L}\right)^2 – \frac{1}{LC}}\), determine the transient behavior. The condition for critical damping occurs when the roots are real and equal, which happens when the discriminant is zero: \(\left(\frac{R}{2L}\right)^2 – \frac{1}{LC} = 0\). This implies \(\frac{R^2}{4L^2} = \frac{1}{LC}\), leading to \(R^2 = \frac{4L}{C}\), or \(R = 2\sqrt{\frac{L}{C}}\). This specific resistance value ensures that the circuit returns to its steady-state value as quickly as possible without oscillation. In the context of the Dar Es Salaam Institute of Technology’s electrical engineering program, understanding transient analysis is crucial for designing and analyzing circuits in various applications, from power systems to control systems and signal processing. The ability to predict and control the transient behavior of circuits is essential for ensuring system stability, preventing damage due to overshoots, and optimizing performance. A critically damped system is often the ideal scenario in many engineering applications where a fast response without overshoot is desired. This question assesses the candidate’s grasp of the relationship between circuit parameters and the qualitative behavior of the system’s response, a core concept in circuit theory taught at the institute.

The scenario describes a project at the Dar Es Salaam Institute of Technology aiming to improve water purification in a peri-urban area. The core challenge is selecting the most appropriate technology considering local constraints and desired outcomes. The question asks to identify the primary factor influencing this choice. The Dar Es Salaam Institute of Technology emphasizes practical, sustainable solutions that address real-world problems within the Tanzanian context. Therefore, the selection of a water purification technology must be grounded in its feasibility and long-term viability. Let’s analyze the options: 1. **Cost-effectiveness and local availability of materials:** This is a crucial consideration for any technology intended for widespread adoption in a developing region. If the initial setup cost is prohibitive, or if replacement parts and maintenance require imported components, the technology is unlikely to be sustainable. The Dar Es Salaam Institute of Technology’s engineering programs often focus on resourcefulness and adapting technologies to local conditions. This aligns with the principle of ensuring that innovations are not only effective but also accessible and maintainable by the community. 2. **Energy efficiency:** While important, especially in areas with unreliable power grids, it’s often a secondary consideration to the fundamental cost and material availability. A highly energy-efficient system that cannot be built or maintained locally will fail. 3. **Technological sophistication:** Advanced technology is not always the best solution. Simplicity, robustness, and ease of operation are often more critical for successful implementation and long-term use in community-based projects. The Institute values practical application over theoretical complexity when it hinders real-world impact. 4. **Aesthetic appeal of the purification unit:** This is a tertiary concern, irrelevant to the functional success and sustainability of a water purification system. Therefore, the most critical factor for a project at the Dar Es Salaam Institute of Technology, aiming for practical and sustainable impact in a peri-urban setting, is the cost-effectiveness and local availability of materials for the chosen purification technology. This ensures that the solution can be implemented, operated, and maintained by the community it serves, reflecting the Institute’s commitment to impactful, contextually relevant engineering.

The scenario describes a fundamental challenge in data integrity and system design, particularly relevant to the robust engineering principles emphasized at Dar Es Salaam Institute of Technology. The core issue is ensuring that a distributed ledger system, like one potentially used for academic record-keeping or project management at the institute, can maintain its immutability and chronological order even when faced with malicious attempts to alter past transactions. Consider a block in a blockchain where the hash of the previous block is \(H_{prev}\) and the current block’s data includes a timestamp, a list of transactions, and a nonce. The hash of the current block, \(H_{current}\), is calculated based on all these elements. If an attacker attempts to modify a transaction within this block, the hash \(H_{current}\) will change. To maintain the chain’s integrity, the attacker would then need to recalculate the hash for the subsequent block, which includes the original \(H_{current}\). This recalculation would, in turn, invalidate the hash of the block after that, and so on, requiring the attacker to re-mine every subsequent block. The difficulty of this re-mining process is directly proportional to the computational power required to find a valid hash (often involving solving a cryptographic puzzle, like finding a nonce that results in a hash with a specific number of leading zeros). In a proof-of-work system, this computational effort is significant. Therefore, the most effective defense against such tampering is the inherent computational cost of re-mining the altered block and all subsequent blocks in the chain. This cost acts as a deterrent, making it economically or practically infeasible for an attacker to successfully alter historical data without controlling a majority of the network’s computational power (a 51% attack). The question tests the understanding of blockchain’s immutability mechanism, specifically the role of cryptographic hashing and the computational effort required to overcome it. This is crucial for students at Dar Es Salaam Institute of Technology who might be involved in developing or analyzing systems that rely on secure, tamper-evident data storage, such as digital credentials, research data repositories, or supply chain management for critical infrastructure. The concept of proof-of-work and its implications for security are central to understanding distributed ledger technologies.

The question probes the understanding of fundamental principles in electrical circuit analysis, specifically focusing on the behavior of capacitors and inductors in AC circuits and their impact on power factor. In a series RLC circuit connected to an AC voltage source, the impedance \(Z\) is given by \(Z = \sqrt{R^2 + (X_L – X_C)^2}\), where \(R\) is resistance, \(X_L = \omega L\) is inductive reactance, and \(X_C = \frac{1}{\omega C}\) is capacitive reactance. The power factor (PF) is defined as \(\cos(\phi) = \frac{R}{|Z|}\), where \(\phi\) is the phase angle between voltage and current. The scenario describes a circuit where the power factor is lagging, indicating that the inductive reactance is greater than the capacitive reactance (\(X_L > X_C\)). This means the circuit behaves predominantly inductively. To improve the power factor towards unity (ideal), we need to reduce the net reactive component. Adding a capacitor in series will increase the total capacitive reactance, thereby decreasing the net capacitive reactance (\(X_C – X_L\)) or increasing the net inductive reactance (\(X_L – X_C\)), which would further worsen the lagging power factor. Conversely, adding an inductor in series would increase the inductive reactance, further exacerbating the lagging power factor. To correct a lagging power factor, we need to introduce a leading reactive component. This is typically achieved by adding a capacitor in parallel with the load. However, the question specifies adding a component *in series* with the existing circuit. In a series RLC circuit, to shift the power factor from lagging towards unity, the net reactance must be reduced. If the circuit is already lagging (\(X_L > X_C\)), adding more inductance will increase \(X_L\), making \(X_L – X_C\) even larger and the power factor more lagging. Adding more capacitance will decrease \(X_C\), making \(X_L – X_C\) larger if \(X_L\) is dominant, or it could potentially reduce the net reactance if \(X_C\) becomes dominant. However, the most direct way to reduce a lagging power factor by adding a series component is to add a component that *opposes* the existing net reactance. Since the power factor is lagging, the circuit has a net inductive reactance. To counteract this, we need to introduce a capacitive reactance. Therefore, adding a capacitor in series will increase the total capacitive reactance, effectively reducing the difference \(X_L – X_C\), and moving the power factor closer to unity. The correct answer is adding a capacitor in series. This increases the total capacitive reactance, reducing the overall inductive reactance (\(X_L – X_C\)) and thus improving the lagging power factor. The explanation does not involve numerical calculation as the question is conceptual.

The question probes the understanding of fundamental principles in electrical engineering, specifically concerning the behavior of circuits under transient conditions. When a switch in a series RL circuit is closed, the current does not instantaneously reach its steady-state value. Instead, it rises exponentially towards it. The time constant, denoted by the Greek letter tau (\(\tau\)), is a crucial parameter that characterizes this rise. For an RL circuit, the time constant is defined as the ratio of the inductance (L) to the resistance (R), i.e., \(\tau = \frac{L}{R}\). This value represents the time it takes for the current to reach approximately \(63.2\%\) of its final steady-state value. The question asks about the state of the inductor’s magnetic field energy at the moment the current reaches \(50\%\) of its steady-state maximum. The energy stored in an inductor is given by the formula \(E = \frac{1}{2}LI^2\), where L is the inductance and I is the current flowing through it. If the current is \(50\%\) of its steady-state maximum, let’s call this \(I_{ss}\), then the current at this point is \(0.5 \times I_{ss}\). The energy stored at this point would be \(E_{0.5} = \frac{1}{2}L(0.5 \times I_{ss})^2 = \frac{1}{2}L(0.25 \times I_{ss}^2) = 0.25 \times (\frac{1}{2}LI_{ss}^2)\). The steady-state energy, when the current has reached its maximum \(I_{ss}\), is \(E_{ss} = \frac{1}{2}LI_{ss}^2\). Therefore, the energy stored at \(50\%\) of the steady-state current is \(0.25 \times E_{ss}\), which means it is \(25\%\) of the maximum energy the inductor will store. This demonstrates a non-linear relationship between current and stored energy, a key concept in understanding inductive behavior during transient states, relevant to power systems and control engineering studies at Dar Es Salaam Institute of Technology.

The question probes the understanding of fundamental principles in electrical engineering, specifically concerning the behavior of circuits under varying conditions and the implications for component selection and system design, which are core to the curriculum at Dar Es Salaam Institute of Technology. The scenario involves a series RLC circuit. The impedance of a series RLC circuit is given by \(Z = \sqrt{R^2 + (X_L – X_C)^2}\), where \(R\) is resistance, \(X_L = \omega L\) is inductive reactance, and \(X_C = \frac{1}{\omega C}\) is capacitive reactance. At resonance, \(X_L = X_C\), leading to minimum impedance \(Z = R\). The power factor is given by \(\cos(\phi) = \frac{R}{Z}\). A leading power factor indicates that the current leads the voltage, which occurs in a capacitive circuit (\(X_C > X_L\)). A lagging power factor indicates that the current lags the voltage, which occurs in an inductive circuit (\(X_L > X_C\)). In the given scenario, the circuit is operating at a frequency below its resonant frequency. This means that the capacitive reactance (\(X_C\)) is greater than the inductive reactance (\(X_L\)). Consequently, the term \((X_L – X_C)\) will be negative. The impedance \(Z = \sqrt{R^2 + (X_L – X_C)^2}\) will be greater than \(R\). Since \(X_C > X_L\), the circuit behaves capacitively, and the phase angle \(\phi\) will be negative (or the current will lead the voltage). A leading power factor is associated with a capacitive circuit. Therefore, the power factor will be leading. The magnitude of the impedance will be \(\sqrt{R^2 + (X_C – X_L)^2}\). The power factor is \(\frac{R}{\sqrt{R^2 + (X_C – X_L)^2}}\). Since \(X_C > X_L\), the circuit is capacitive, and the power factor is leading. The correct answer is that the circuit will exhibit a leading power factor because it is operating below its resonant frequency, making the capacitive reactance dominant. This understanding is crucial for students at Dar Es Salaam Institute of Technology, as it relates to power system efficiency, voltage regulation, and the design of electrical machinery and power electronics, all areas of significant focus. Recognizing the behavior of RLC circuits at different frequencies is a foundational skill for electrical engineers.

The question probes the understanding of the fundamental principles of effective project management within the context of technological innovation, a core area for students entering Dar Es Salaam Institute of Technology. The scenario describes a team developing a novel renewable energy system. The key challenge is balancing rapid prototyping with rigorous quality assurance. To determine the most appropriate project management approach, we must consider the inherent uncertainties in developing new technology. Agile methodologies, particularly Scrum, excel in iterative development, allowing for frequent feedback and adaptation to unforeseen technical hurdles. This aligns with the need for rapid prototyping. However, the emphasis on robust quality assurance, crucial for a renewable energy system intended for practical application and safety, suggests that a purely agile approach might not be sufficient without modifications. A hybrid approach, often termed “Agile with a strong QA focus” or “Iterative Development with Integrated Quality Gates,” best addresses this duality. This involves using agile sprints for development and prototyping, but embedding formal, rigorous quality assurance checkpoints at the end of each sprint or at predefined milestones. These checkpoints would include comprehensive testing, simulation, and validation against performance specifications. This ensures that while the development process remains flexible and responsive, the product’s reliability and safety are not compromised. The other options represent less suitable strategies. A purely Waterfall model would be too rigid for the iterative nature of innovation. A “Lean Startup” approach, while valuable for market validation, might not provide the necessary structured engineering rigor for a complex energy system. A “Critical Path Method” is primarily a scheduling tool for predictable tasks and less suited for managing the inherent unknowns of cutting-edge technology development. Therefore, the integration of agile development with stringent, phased quality assurance is the most effective strategy for this scenario at Dar Es Salaam Institute of Technology.

The question assesses understanding of the fundamental principles of digital signal processing, specifically concerning the Nyquist-Shannon sampling theorem and its implications for signal reconstruction. The scenario describes a continuous-time signal \(x(t)\) with a maximum frequency component of 5 kHz. According to the Nyquist-Shannon sampling theorem, to perfectly reconstruct a continuous-time signal from its discrete samples, the sampling frequency (\(f_s\)) must be at least twice the maximum frequency (\(f_{max}\)) present in the signal. This minimum sampling frequency is known as the Nyquist rate, given by \(f_{Nyquist} = 2 \times f_{max}\). In this case, \(f_{max} = 5\) kHz. Therefore, the minimum sampling frequency required for perfect reconstruction is \(f_{Nyquist} = 2 \times 5 \text{ kHz} = 10 \text{ kHz}\). Sampling at a frequency lower than the Nyquist rate leads to aliasing, where higher frequencies in the original signal masquerade as lower frequencies in the sampled signal, making accurate reconstruction impossible. Sampling at exactly the Nyquist rate or higher ensures that all the information in the original signal is preserved in the discrete samples. The Dar Es Salaam Institute of Technology Entrance Exam, particularly for programs in electrical engineering and computer science, emphasizes a strong grasp of these foundational signal processing concepts. Understanding the Nyquist criterion is crucial for designing digital communication systems, audio and video processing, and control systems, all areas of significant research and application at institutions like Dar Es Salaam Institute of Technology. The ability to identify the minimum sampling rate required for faithful signal representation is a core competency expected of aspiring engineers and technologists.

The question tests the understanding of the fundamental principles of electrical circuit analysis, specifically concerning Kirchhoff’s Voltage Law (KVL) and Ohm’s Law in a series-parallel circuit. While no explicit calculation is required to arrive at the answer, the reasoning process involves applying these laws conceptually. Consider a circuit with a voltage source \(V_{source}\) connected to a series combination of resistor \(R_1\) and a parallel combination of resistors \(R_2\) and \(R_3\). According to KVL, the sum of voltage drops across all components in a closed loop must equal the source voltage. In this configuration, the total current \(I_{total}\) flows from the source, through \(R_1\). This current then splits into two branches, \(I_2\) through \(R_2\) and \(I_3\) through \(R_3\). The voltage drop across \(R_1\) is \(V_{R1} = I_{total} \times R_1\). The voltage across the parallel combination of \(R_2\) and \(R_3\) is the same, let’s call it \(V_{parallel}\). By KVL, \(V_{source} = V_{R1} + V_{parallel}\). The question asks about the consequence of increasing \(R_2\) while keeping \(R_1\), \(R_3\), and \(V_{source}\) constant. When \(R_2\) increases, its resistance in the parallel combination increases. The equivalent resistance of the parallel combination, \(R_{eq\_parallel} = \frac{R_2 \times R_3}{R_2 + R_3}\), will increase as \(R_2\) increases (assuming \(R_3\) is finite). Since \(R_{eq\_parallel}\) increases, and it is in series with \(R_1\), the total equivalent resistance of the circuit, \(R_{total} = R_1 + R_{eq\_parallel}\), will also increase. According to Ohm’s Law, \(I_{total} = \frac{V_{source}}{R_{total}}\). As \(R_{total}\) increases, the total current \(I_{total}\) drawn from the source will decrease. This reduced total current flows through \(R_1\), so the voltage drop across \(R_1\), \(V_{R1} = I_{total} \times R_1\), will decrease. Since \(V_{source} = V_{R1} + V_{parallel}\), and \(V_{source}\) and \(V_{R1}\) both decrease, \(V_{parallel}\) must also decrease. The current \(I_2\) through \(R_2\) is given by \(I_2 = \frac{V_{parallel}}{R_2}\). As \(V_{parallel}\) decreases and \(R_2\) increases, the current \(I_2\) will decrease significantly. The current \(I_3\) through \(R_3\) is given by \(I_3 = \frac{V_{parallel}}{R_3}\). Since \(V_{parallel}\) decreases and \(R_3\) is constant, \(I_3\) will also decrease. Therefore, both the current through \(R_2\) and the current through \(R_3\) will decrease. The core concept here, relevant to engineering disciplines at Dar Es Salaam Institute of Technology, is the interdependence of voltage, current, and resistance in circuit analysis. Understanding how changes in component values affect circuit behavior is fundamental for designing and troubleshooting electrical systems. This question probes the ability to apply KVL and Ohm’s Law to predict circuit performance under varying conditions, a skill crucial for students in electrical engineering and related fields. The scenario highlights the practical implications of component selection in achieving desired circuit outcomes, emphasizing the analytical rigor expected at the institute.

The question probes understanding of the fundamental principles governing the efficient transfer of electrical energy in a distributed network, a core concept in electrical engineering programs at Dar Es Salaam Institute of Technology. The scenario describes a power distribution system where voltage drop is a critical concern, impacting the quality of service to end-users. To minimize power loss and ensure voltage stability, the placement of substations is paramount. Power loss in a transmission line is proportional to the square of the current and the resistance of the line, expressed as \(P_{loss} = I^2R\). Voltage drop is directly proportional to current and resistance, \(V_{drop} = IR\). Therefore, to reduce both voltage drop and power loss, it is essential to minimize the current flowing through the distribution lines. This is achieved by stepping up the voltage at the source and stepping it down closer to the load. In a distributed network with multiple load centers, strategically locating substations at points that can serve these centers with shorter, lower-resistance lines, and at appropriate voltage levels, is key. This minimizes the total resistance and current in the distribution network, thereby reducing overall power loss and voltage drop. The principle of minimizing the product of voltage drop and current across all segments of the distribution network, weighted by the length of those segments, guides optimal substation placement. This involves balancing the cost of substations against the savings in energy losses and improved voltage regulation. The most effective strategy involves distributing the voltage transformation points to keep the current in the primary distribution feeders as low as possible, which is achieved by having substations situated to serve distinct, proximate load clusters.

The question probes the understanding of the fundamental principles of electrical circuit analysis, specifically focusing on Kirchhoff’s Voltage Law (KVL) and the concept of equivalent resistance in series and parallel configurations. While no explicit calculation is required for the final answer, the underlying logic involves conceptual application of these laws. To determine the correct answer, one must analyze the circuit’s topology and how voltage drops are distributed. In a series circuit, the total voltage is the sum of individual voltage drops, and current is constant. In a parallel circuit, the voltage across each branch is the same, and the total current is the sum of branch currents. The scenario describes a complex network where understanding these relationships is crucial for predicting behavior. The correct option reflects a scenario where the voltage source is entirely consumed by the resistive elements, with no residual voltage or a voltage that contradicts the fundamental laws of circuit behavior. The other options present scenarios that would violate KVL or the principles of current division/voltage distribution in series and parallel combinations. For instance, a voltage that is less than the sum of voltage drops in a series path, or a voltage that implies current flowing from a lower potential to a higher potential without an external source, would be incorrect. The correct answer represents a state where the sum of voltage drops across all components in any closed loop equals the voltage supplied by the source, a direct application of KVL. This understanding is foundational for all electrical engineering disciplines at Dar Es Salaam Institute of Technology Entrance Exam, impacting areas from power systems to microelectronics.

The question probes the understanding of the fundamental principles of electrical circuit analysis, specifically concerning the behavior of capacitors in a DC circuit after a significant time has passed. In a DC circuit, a capacitor acts as an open circuit once it is fully charged. This means that no current flows through the capacitor branch. The circuit consists of a voltage source, a resistor, and a capacitor connected in series. When the switch is closed, the capacitor begins to charge. After a long time (effectively infinite time, denoted as \(t \to \infty\)), the capacitor will have reached its maximum charge, and the voltage across it will be equal to the source voltage. Consequently, the current flowing through the circuit will be zero, as the capacitor presents an infinite impedance to DC current. The voltage across the resistor, according to Ohm’s Law (\(V_R = I \cdot R\)), will also be zero because the current (\(I\)) is zero. Therefore, the voltage across the capacitor will be equal to the source voltage. If the source voltage is 12V, then after a long time, the voltage across the capacitor will be 12V, and the voltage across the resistor will be 0V. The question asks for the voltage across the resistor.

The scenario describes a fundamental challenge in data integrity and information management, particularly relevant to engineering and technology disciplines where accuracy is paramount. The core issue is the discrepancy between the intended meaning of a dataset and its actual representation due to a systematic error in data collection or processing. The question probes the understanding of how to identify and rectify such discrepancies, emphasizing the importance of validation and verification protocols. In this context, the concept of “data drift” or “concept drift” is highly relevant. Data drift occurs when the statistical properties of the target variable, which the model is trying to predict, change over time in unforeseen ways. This is distinct from *covariate shift*, where the input features change but the relationship between features and the target remains the same. Here, the underlying phenomenon being measured (soil moisture) has a consistent relationship with the sensor readings, but the sensor itself has degraded, altering the mapping. The critical element is recognizing that the observed sensor readings are no longer a faithful representation of the actual soil moisture levels. The systematic offset introduced by the sensor’s degradation means that a direct calibration curve derived from initial, accurate readings will no longer apply. To correct this, one must establish a new, accurate baseline or recalibrate the sensor based on known ground truth values. The most effective approach to identify and correct such a systematic deviation, without knowing the exact nature of the degradation, is to compare the sensor’s output against a reliable, independently verified source of ground truth. This allows for the calculation of the magnitude of the systematic error (the offset) and its subsequent removal from future readings. The explanation for the correct answer involves understanding that the sensor’s output is consistently higher than the actual soil moisture. This implies a positive bias. To correct this, one must subtract this bias from all subsequent readings. If the average difference between the sensor readings and the actual soil moisture, when the actual soil moisture was known to be 15%, is \(5\%\), then the systematic error (bias) is \(+5\%\). Therefore, to obtain the true soil moisture, one must subtract this \(5\%\) from the sensor’s reported value. For instance, if the sensor reports \(20\%\), the actual soil moisture is \(20\% – 5\% = 15\%\). This process is known as bias correction or calibration. The other options represent less effective or incorrect approaches: simply averaging readings doesn’t address the systematic error; assuming the error is random would lead to incorrect corrections; and ignoring the discrepancy would perpetuate the inaccuracy.

The question probes the understanding of fundamental principles of electrical circuit analysis, specifically concerning the behavior of capacitors in a DC circuit after a switch is closed. Initially, the capacitors are uncharged. When the switch is closed, the circuit effectively becomes a series RC circuit with a voltage source. The current in a series RC circuit decays exponentially over time, described by the formula \(I(t) = \frac{V}{R} e^{-t/RC}\), where \(V\) is the voltage, \(R\) is the resistance, and \(C\) is the capacitance. The voltage across the capacitor, \(V_C(t)\), rises exponentially towards the source voltage, given by \(V_C(t) = V(1 – e^{-t/RC})\). The question asks about the initial state *immediately* after the switch is closed. At \(t=0^+\) (infinitesimally after the switch is closed), the capacitor acts as a short circuit because it has not yet had time to accumulate any charge. This means the voltage across it is zero, and it behaves as if it were a wire. Consequently, the entire source voltage will drop across the resistor. Therefore, the current flowing through the circuit is determined solely by Ohm’s Law applied to the resistor: \(I = \frac{V}{R}\). In this specific scenario, \(V = 12\) V and \(R = 6\) \(\Omega\). Thus, the initial current is \(I = \frac{12 \text{ V}}{6 \text{ \(\Omega\)}} = 2\) A. The voltage across the capacitor at \(t=0^+\) is \(0\) V, and the voltage across the resistor is \(12\) V. The question asks for the voltage across the resistor.

The question probes understanding of the fundamental principles of electrical circuit analysis, specifically concerning the behavior of capacitors in a DC circuit after a switch is closed. Initially, the capacitor is uncharged. When the switch is closed at \(t=0\), the capacitor begins to charge through the resistor. The voltage across a charging capacitor in an RC circuit is given by the formula \(V_C(t) = V_s(1 – e^{-t/RC})\), where \(V_s\) is the source voltage, \(R\) is the resistance, and \(C\) is the capacitance. The current through the resistor (and thus charging the capacitor) is given by \(I(t) = \frac{V_s}{R}e^{-t/RC}\). At \(t=0^+\) (immediately after the switch is closed), the capacitor acts like a short circuit because its voltage cannot change instantaneously. Therefore, the initial current is limited only by the resistor, \(I(0^+) = \frac{V_s}{R}\). As time progresses, the capacitor charges, and its voltage increases, opposing the source voltage. This causes the charging current to decrease exponentially. At steady state, as \(t \to \infty\), the capacitor becomes fully charged to the source voltage \(V_s\), and the current \(I(\infty)\) becomes zero. The question asks about the state of the circuit at \(t=0^+\). At this precise moment, the capacitor has not had any time to accumulate charge, meaning its voltage is still 0V. Since the voltage across the capacitor is 0V, it behaves like a short circuit. In this scenario, the entire source voltage \(V_s\) drops across the resistor \(R\). Consequently, the current flowing through the circuit is determined solely by Ohm’s Law applied to the resistor: \(I = \frac{V_s}{R}\). This initial surge of current is the maximum current in the circuit. The rate at which the capacitor charges is determined by the time constant \(\tau = RC\). A smaller time constant means faster charging. The Dar Es Salaam Institute of Technology Entrance Exam often tests these foundational concepts in electrical engineering, emphasizing the transient behavior of circuits, which is crucial for understanding signal processing and control systems. Understanding these initial conditions is vital for designing and analyzing electronic systems, ensuring stability and predictable performance.

The question assesses understanding of the fundamental principles of electrical circuit analysis, specifically concerning Kirchhoff’s Voltage Law (KVL) and Ohm’s Law in a series-parallel circuit. While no explicit calculation is required for the final answer, the underlying concept involves analyzing current distribution and voltage drops. Consider a circuit with a voltage source \(V_{source}\) connected to a series combination of a resistor \(R_1\) and a parallel combination of resistors \(R_2\) and \(R_3\). The total equivalent resistance of the parallel branch is \(R_{parallel} = \frac{R_2 \times R_3}{R_2 + R_3}\). The total resistance of the circuit is \(R_{total} = R_1 + R_{parallel}\). According to Ohm’s Law, the total current drawn from the source is \(I_{total} = \frac{V_{source}}{R_{total}}\). This total current flows through \(R_1\). The voltage drop across \(R_1\) is \(V_{R1} = I_{total} \times R_1\). The remaining voltage, \(V_{parallel} = V_{source} – V_{R1}\), is applied across the parallel combination of \(R_2\) and \(R_3\). The current through \(R_2\) is \(I_{R2} = \frac{V_{parallel}}{R_2}\) and the current through \(R_3\) is \(I_{R3} = \frac{V_{parallel}}{R_3}\). The question asks about a scenario where the current through one of the parallel resistors is significantly larger than the current through the other. This implies a substantial difference in their resistance values. If \(R_2\) is much smaller than \(R_3\), then \(R_{parallel} \approx R_2\). Consequently, \(I_{R2}\) will be much larger than \(I_{R3}\), as the voltage across both is the same. This scenario directly relates to the concept of current division in parallel circuits, where current preferentially flows through the path of least resistance. Understanding this principle is crucial for designing and analyzing electronic systems, ensuring proper component operation and preventing overload, which is a core competency for engineering students at Dar Es Salaam Institute of Technology. The ability to predict current distribution based on resistance values is fundamental to troubleshooting and optimizing circuit performance.

The scenario describes a project at the Dar Es Salaam Institute of Technology aiming to improve urban water distribution efficiency. The core challenge is to select a suitable methodology for analyzing the impact of introducing a new sensor network on water pressure fluctuations across different zones of the city. The question probes the understanding of appropriate analytical frameworks for complex, interconnected systems with real-time data. The introduction of a sensor network generates a large volume of time-series data reflecting dynamic pressure changes. Analyzing this data requires methods that can capture temporal dependencies, spatial correlations, and the impact of external factors (e.g., demand, pipe integrity). Option a) proposes a spatio-temporal statistical modeling approach. This is highly appropriate because it directly addresses the dual nature of the data: its occurrence over time (temporal) and its geographical distribution (spatial). Techniques within this domain, such as Gaussian Processes or Autoregressive Integrated Moving Average (ARIMA) models extended for spatial correlation, are designed to handle such data. They can model how pressure at one point influences pressure at nearby points and how these pressures evolve over time, accounting for the network’s physical layout and the flow dynamics. This aligns with the need to understand the system’s behavior as a whole and the localized effects of the new sensors. Option b) suggests a simple linear regression. This is inadequate because water distribution systems are inherently non-linear, and pressure fluctuations are influenced by numerous interacting variables that cannot be captured by a single linear relationship. It fails to account for spatial dependencies or the complex temporal dynamics. Option c) recommends a discrete event simulation. While simulation can be useful for modeling system behavior, it is typically used to predict outcomes under specific scenarios rather than to analyze the impact of existing, real-time data from a deployed network. It would require extensive calibration and might not be the most direct method for analyzing the observed data’s characteristics and correlations. Option d) proposes a comparative case study analysis. This approach is qualitative and focuses on comparing different systems or interventions. It is not suitable for analyzing the quantitative, time-series data generated by the sensor network to understand the intricate pressure dynamics within a single, complex urban water system. Therefore, a spatio-temporal statistical modeling approach is the most robust and appropriate methodology for analyzing the data from the Dar Es Salaam Institute of Technology’s water distribution sensor network project.

The scenario describes a project at the Dar Es Salaam Institute of Technology aiming to improve water purification using locally sourced materials. The core challenge is to select the most appropriate filtration medium based on its ability to remove suspended solids and dissolved organic matter, while also considering cost-effectiveness and sustainability, key principles emphasized in the institute’s engineering programs. To determine the optimal material, one must understand the principles of adsorption and mechanical filtration. Activated charcoal, derived from readily available biomass like coconut shells, is known for its high surface area and porous structure, making it an excellent adsorbent for organic impurities. Sand, particularly fine sand, acts as a mechanical filter, trapping larger suspended particles. Zeolites, naturally occurring or synthesized aluminosilicates, possess a porous crystalline structure that can trap ions and molecules through ion exchange and molecular sieving, effective for removing certain dissolved contaminants and heavy metals. Ceramic filters, typically made from clay fired at high temperatures, create a fine pore structure that physically blocks bacteria and larger suspended solids. Considering the dual requirement of removing both suspended solids and dissolved organic matter, a layered approach often proves most effective. Fine sand would address larger suspended particles. Activated charcoal would then adsorb dissolved organic compounds, improving taste and odor. Zeolites could be incorporated for specific ion removal if needed, and ceramic filters offer a final barrier against microbial contamination. However, the question asks for the *single most appropriate* medium for a broad range of contaminants, implying a material that offers a good balance of both mechanical and adsorptive properties. Activated charcoal, due to its extensive pore network and chemical affinity for organic molecules, excels at removing dissolved organic matter, which significantly impacts water quality beyond just clarity. While sand is excellent for suspended solids, it has limited capacity for dissolved impurities. Zeolites are more specialized for ion exchange. Ceramic filters are primarily mechanical barriers. Therefore, activated charcoal, when properly prepared and utilized, offers the most comprehensive solution for the described purification goals within the context of sustainable, locally sourced materials, aligning with Dar Es Salaam Institute of Technology’s commitment to practical, impactful engineering solutions. The selection prioritizes the removal of dissolved organic matter, a common challenge in many water sources, and the material’s adsorptive capacity is paramount.

The question probes the understanding of fundamental principles in electrical engineering, specifically concerning the behavior of circuits under transient conditions and the role of energy storage elements. When a DC voltage source is suddenly applied to a series RL circuit, the current does not instantaneously reach its steady-state value. Instead, it rises exponentially, governed by the time constant of the circuit. The inductor opposes this change in current by generating a back EMF. The voltage across the inductor, \(V_L\), is given by \(V_L = L \frac{di}{dt}\). At the instant the switch is closed (t=0), the inductor acts as an open circuit, meaning it resists any immediate change in current. Therefore, the initial current through the inductor is zero. Consequently, the voltage drop across the resistor, \(V_R = iR\), is also zero at \(t=0\). By Kirchhoff’s Voltage Law (KVL), the sum of voltages in the loop must equal the applied voltage, \(V_s\). So, \(V_s = V_R + V_L\). At \(t=0\), \(V_s = 0 + V_L\), which implies \(V_L = V_s\). This means the entire source voltage is initially dropped across the inductor as it opposes the sudden attempt to establish current. As time progresses, the current increases, and the voltage across the inductor decreases exponentially, while the voltage across the resistor increases. The correct understanding of this transient behavior, particularly the initial conditions at \(t=0\), is crucial for analyzing circuit dynamics. The other options represent incorrect interpretations of how inductors behave in DC circuits during the switching event. For instance, assuming the inductor acts as a short circuit at \(t=0\) would imply zero voltage across it, which contradicts its fundamental property of opposing current change. Similarly, assuming the resistor has the full voltage drop implies the inductor has no voltage, which is also incorrect for an RL circuit at the moment of connection.

The question assesses the understanding of fundamental principles of electrical circuit analysis, specifically focusing on Kirchhoff’s Voltage Law (KVL) and Ohm’s Law in a series-parallel circuit. The scenario involves a student at Dar Es Salaam Institute of Technology designing a power supply unit. First, we identify the components and their arrangement. We have a main voltage source, \(V_{source}\), connected to a series combination of a resistor \(R_1\) and a parallel combination of two resistors, \(R_2\) and \(R_3\). The total current drawn from the source, \(I_{total}\), flows through \(R_1\). This current then splits into \(I_2\) through \(R_2\) and \(I_3\) through \(R_3\). According to Ohm’s Law, the voltage drop across \(R_1\) is \(V_{R1} = I_{total} \times R_1\). The voltage across the parallel combination of \(R_2\) and \(R_3\) is the same, let’s call it \(V_{parallel}\). By KVL, \(V_{source} = V_{R1} + V_{parallel}\). The equivalent resistance of the parallel combination of \(R_2\) and \(R_3\) is given by \(R_{parallel} = \frac{R_2 \times R_3}{R_2 + R_3}\). The total current drawn from the source is \(I_{total} = \frac{V_{source}}{R_1 + R_{parallel}}\). The voltage across the parallel combination is \(V_{parallel} = I_{total} \times R_{parallel}\). The current through \(R_2\) is \(I_2 = \frac{V_{parallel}}{R_2}\) and the current through \(R_3\) is \(I_3 = \frac{V_{parallel}}{R_3}\). Also, \(I_{total} = I_2 + I_3\). The question asks about the most critical parameter to monitor for ensuring stable operation of the power supply, considering the potential for component failure or unexpected load variations. Let’s analyze the options: 1. **Voltage across \(R_1\):** While this voltage drop is important for the circuit’s operation, monitoring it alone doesn’t directly indicate the overall stability of the output voltage or the health of the parallel branch, which is crucial for a power supply. 2. **Current through \(R_2\):** Monitoring the current through a single parallel resistor is insufficient. If \(R_3\) fails open, \(I_2\) would increase significantly, potentially damaging \(R_2\). If \(R_2\) fails open, \(I_2\) would be zero, which might not be immediately indicative of a problem if other parameters are within range. 3. **Total current drawn from the source (\(I_{total}\)):** This is a vital parameter. An increase in total current often signifies an overload condition or a fault in the load, which could lead to overheating and failure of components like \(R_1\) or the source itself. A decrease might indicate a problem with the load or a partial failure in the parallel branch. Monitoring this provides an overall indication of the circuit’s demand and potential stress. 4. **Voltage across the parallel combination (\(V_{parallel}\)):** This represents the output voltage of the power supply, assuming the parallel branch is directly connected to the output. For a power supply, maintaining a stable output voltage is paramount. Fluctuations in \(V_{parallel}\) directly indicate instability or a problem with the power delivery to the load. If \(R_2\) or \(R_3\) were to fail (e.g., open circuit), \(V_{parallel}\) would change significantly, reflecting the altered circuit behavior and potential impact on the load. This parameter is the most direct indicator of the power supply’s primary function: delivering a stable voltage. Considering the primary function of a power supply is to deliver a stable voltage to a load, monitoring the voltage across the parallel combination, which represents the output voltage, is the most critical for ensuring stable operation and detecting deviations from the intended performance. This directly relates to the core purpose of a power supply unit as studied in electrical engineering programs at Dar Es Salaam Institute of Technology. Final Answer: The voltage across the parallel combination.

The question probes the understanding of the fundamental principles of electrical circuit analysis, specifically focusing on Kirchhoff’s Voltage Law (KVL) and the concept of equivalent resistance in a series-parallel circuit. To determine the voltage across the 10 Ohm resistor in the given circuit, one must first simplify the circuit to find the total equivalent resistance and then calculate the total current flowing from the source. Step 1: Calculate the equivalent resistance of the parallel combination of the 15 Ohm and 30 Ohm resistors. \[ R_{parallel} = \frac{R_1 \times R_2}{R_1 + R_2} = \frac{15 \, \Omega \times 30 \, \Omega}{15 \, \Omega + 30 \, \Omega} = \frac{450 \, \Omega^2}{45 \, \Omega} = 10 \, \Omega \] Step 2: Calculate the total equivalent resistance of the circuit by adding the series resistances. \[ R_{total} = R_{series1} + R_{parallel} + R_{series2} = 5 \, \Omega + 10 \, \Omega + 10 \, \Omega = 25 \, \Omega \] Step 3: Calculate the total current flowing from the 100V source using Ohm’s Law. \[ I_{total} = \frac{V_{source}}{R_{total}} = \frac{100 \, V}{25 \, \Omega} = 4 \, A \] Step 4: Determine the voltage drop across the first 5 Ohm resistor. \[ V_{5\Omega} = I_{total} \times R_{series1} = 4 \, A \times 5 \, \Omega = 20 \, V \] Step 5: Apply Kirchhoff’s Voltage Law to the loop containing the voltage source, the first 5 Ohm resistor, and the parallel combination. The voltage across the parallel combination is the voltage across the 10 Ohm resistor we are interested in. \[ V_{source} – V_{5\Omega} – V_{parallel} = 0 \] \[ 100 \, V – 20 \, V – V_{parallel} = 0 \] \[ V_{parallel} = 80 \, V \] Since the 10 Ohm resistor is in series with the parallel combination, and the current through the parallel combination is the same as the total current (4A), the voltage across the 10 Ohm resistor is calculated as: \[ V_{10\Omega} = I_{total} \times R_{10\Omega} = 4 \, A \times 10 \, \Omega = 40 \, V \] Wait, this is incorrect. The 10 Ohm resistor is part of the total equivalent resistance calculation, but the question asks for the voltage *across* the 10 Ohm resistor that is in series with the parallel combination. Let’s re-evaluate Step 5. The voltage across the parallel combination is indeed 80V. However, the question asks for the voltage across the *second* 10 Ohm resistor, which is in series with the parallel combination. Let’s re-examine the circuit structure. We have a 100V source, then a 5 Ohm resistor, then a parallel combination of 15 Ohm and 30 Ohm resistors, and finally another 10 Ohm resistor. The total current is 4A. This current flows through the first 5 Ohm resistor and then splits into the parallel branches. After passing through the parallel branches, the current recombines and flows through the final 10 Ohm resistor. Therefore, the voltage across this final 10 Ohm resistor is: \[ V_{final\_10\Omega} = I_{total} \times R_{final\_10\Omega} = 4 \, A \times 10 \, \Omega = 40 \, V \] The voltage across the parallel combination is the voltage that remains after the voltage drops across the two series resistors. Voltage drop across the first 5 Ohm resistor is \( 4 \, A \times 5 \, \Omega = 20 \, V \). Voltage drop across the final 10 Ohm resistor is \( 4 \, A \times 10 \, \Omega = 40 \, V \). Total voltage drop across the series resistors is \( 20 \, V + 40 \, V = 60 \, V \). Therefore, the voltage across the parallel combination is \( 100 \, V – 60 \, V = 40 \, V \). The question asks for the voltage across the 10 Ohm resistor that is in series with the parallel combination. This is the final 10 Ohm resistor. The calculation for the voltage across the 10 Ohm resistor in series with the parallel combination is: \[ V_{10\Omega\_series} = I_{total} \times R_{10\Omega\_series} = 4 \, A \times 10 \, \Omega = 40 \, V \] The correct answer is 40V. This question tests the fundamental understanding of series and parallel resistor combinations, Ohm’s Law, and Kirchhoff’s Voltage Law, which are foundational concepts for electrical engineering students at Dar Es Salaam Institute of Technology. Successfully solving this requires not just applying formulas but also a clear conceptual grasp of how current and voltage behave in different circuit configurations. The ability to correctly identify which resistor the question is referring to and to trace the current path is crucial. This type of problem-solving is essential for analyzing more complex circuits encountered in advanced studies and practical applications within the engineering disciplines offered at Dar Es Salaam Institute of Technology, such as power systems or electronics. It emphasizes the analytical skills needed to break down a problem into manageable steps and apply fundamental principles systematically.

The question assesses understanding of fundamental principles in electrical engineering, specifically concerning the behavior of circuits with reactive components under varying frequencies. The core concept tested is impedance and its frequency dependence. For a series RL circuit, the total impedance \(Z\) is given by \(Z = R + jX_L\), where \(R\) is the resistance and \(X_L\) is the inductive reactance. Inductive reactance is defined as \(X_L = 2\pi fL\), where \(f\) is the frequency and \(L\) is the inductance. The magnitude of the impedance is \(|Z| = \sqrt{R^2 + X_L^2}\). In this scenario, we have a resistor \(R = 100 \Omega\) and an inductor \(L = 0.5 \, \text{H}\). At a frequency of \(f_1 = 50 \, \text{Hz}\): The inductive reactance is \(X_{L1} = 2\pi (50 \, \text{Hz})(0.5 \, \text{H}) = 50\pi \, \Omega\). The magnitude of the impedance is \(|Z_1| = \sqrt{(100 \, \Omega)^2 + (50\pi \, \Omega)^2} = \sqrt{10000 + 2500\pi^2} \, \Omega\). Using \(\pi \approx 3.14\), \(\pi^2 \approx 9.86\). \(|Z_1| \approx \sqrt{10000 + 2500 \times 9.86} \, \Omega = \sqrt{10000 + 24650} \, \Omega = \sqrt{34650} \, \Omega \approx 186.15 \, \Omega\). At a frequency of \(f_2 = 100 \, \text{Hz}\): The inductive reactance is \(X_{L2} = 2\pi (100 \, \text{Hz})(0.5 \, \text{H}) = 100\pi \, \Omega\). The magnitude of the impedance is \(|Z_2| = \sqrt{(100 \, \Omega)^2 + (100\pi \, \Omega)^2} = \sqrt{10000 + 10000\pi^2} \, \Omega\). \(|Z_2| \approx \sqrt{10000 + 10000 \times 9.86} \, \Omega = \sqrt{10000 + 98600} \, \Omega = \sqrt{108600} \, \Omega \approx 329.55 \, \Omega\). The question asks about the effect of increasing frequency on the circuit’s opposition to current flow. As frequency increases, inductive reactance (\(X_L = 2\pi fL\)) increases linearly. Since impedance in a series RL circuit is \(|Z| = \sqrt{R^2 + X_L^2}\), an increase in \(X_L\) will lead to an increase in the total impedance \(|Z|\). This means the circuit will offer greater opposition to the flow of alternating current at higher frequencies. This concept is fundamental to understanding filter circuits and signal processing, areas of significant study within electrical engineering programs at institutions like Dar Es Salaam Institute of Technology. The ability to predict how circuit parameters change with frequency is crucial for designing efficient and effective electronic systems, aligning with the institute’s emphasis on practical application and theoretical rigor.